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STA321TR 查看數據表(PDF) - STMicroelectronics

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STA321TR Datasheet PDF : 157 Pages
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Power-up and power-down sequences
4
Power-up and power-down sequences
STA321
4.1
Device power-up
After providing the power supply to the device, it is necessary to wait until the DC regulator
PWUP time has elapsed before the device can be set up and used for normal operations.
(see Figure 7).
Figure 7. Startup sequence
VVDDVIDODIO 3v3
VVDVDDD_RREEGG 2v2
VPVDPDVDD
SSTBTYB(Yact(iavectHiv) e H)
RRSTSNT(Nact(ivaecLti)ve L)
D(aPCctWiRveeDgH.NiPghW()aDcNtive H)
DC Reg. A. OK
(aAct.iOveKHi(gahc) tive H)
2
I IC2CrWearidtings
2
I CI2cCloCcLkK
XTXTI I//MMCCLLKK
Vdd ramp
DC reg. PWUP time
Device in reset mode
User configuration via I2C
Table 8. Power-up signal description
Signal/pin
Type
Description
VDDIO
Supply
Power supply of the digital pads (= VDDIO1,2)
VDD_REG Supply
Power supply of the system core (= VDD_REG1,2)
PVDD
Supply
Power supply of the PLL
STBY
In (digital) External standby signal provided by the user
RSTN
In (digital) External reset signal provided by the user
PWDN
Internal
Power-down of the DC regulator cell, controlled by the core
A. OK
I2C read
I2C clock
Internal
In (I2C)
Internal
DC regulator status, when active the 1.8 V is provided to the core
Configuration commands coming to the I2C interface
I2C peripheral clock
XTI/MCLK In (digital) Clock input source
20/157
Doc ID 15351 Rev 3

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