STA335BWS 查看數據表（PDF） - STMicroelectronics
零件编号
产品描述 (功能)
生产厂家
STA335BWS Datasheet PDF : 68 Pages
| |||
STA335BWS
Register description
6.5.7 Zero-crossing volume enable
6.5.8
Bit R/W RST
Name
Description
6 R/W 1
ZCE
1: Volume adjustments only occur at digital
zero-crossings
0: Volume adjustments occur immediately
The ZCE bit enables zero-crossing volume adjustments. When volume is adjusted on digital
zero-crossings no clicks are audible.
Soft volume update enable
Bit R/W RST
7 R/W 1
Name
SVE
Description
1: Volume adjustments ramp according to SVR settings
0: Volume adjustments occur immediately
6.6
6.6.1
Configuration register F (addr 0x05)
D7
EAPD
0
D6
PWDN
1
D5
ECLE
0
Output configuration
D4
LDTE
1
D3
BCLE
1
D2
D1
D0
IDE
OCFG1
OCFG0
1
0
0
Bit R/W RST
0
R/W
0
1
R/W
0
Name
OCFG0
OCFG1
Description
Selects the output configuration
Table 16. Output configuration engine selection
OCFG[1:0]
Output configuration
2 channel (full-bridge) power, 2 channel data-out:
1A/1B → 1A/1B
2A/2B → 2A/2B
00
LineOut1 → 3A/3B
LineOut2 → 4A/4B
Line Out Configuration determined by LOC register
2 (half-bridge), 1 (full-bridge) on-board power:
1A → 1A, Binary 0 °
2A → 1B, Binary 90°
01
3A/3B → 2A/2B, Binary 45°
1A/B → 3A/B, Binary 0°
2A/B → 4A/B, Binary 90°
Config pin
0
0
35/68
Share Link: 