STA335BWS 查看數據表（PDF） - STMicroelectronics
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STA335BWS Datasheet PDF : 68 Pages
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Register description
STA335BWS
6.7
6.7.1
6.7.2
6.7.3
6.7.4
Volume control registers (addr 0x06 to 0x0A)
Mute/line output configuration register
D7
LOC1
0
D6
LOC0
0
D5
D4
Reserved
D3
C3M
0
D2
C2M
0
D1
C1M
0
D0
MMUTE
0
LOC[1:0]
Line output configuration
00
Line output fixed - no volume, no EQ
01
Line output variable - CH3 volume effects line output, no EQ
10
Line output variable with EQ - CH3 volume effects line output
Line output is only active when OCFG = 00. In this case LOC determines the line output
configuration. The source of the line output is always the channel 1 and 2 inputs.
Master volume register
D7
MV7
1
D6
MV6
1
D5
MV5
1
D4
MV4
1
D3
MV3
1
D2
MV2
1
D1
MV1
1
D0
MV0
1
Channel 1 volume
D7
C1V7
0
D6
C1V6
1
D5
C1V5
1
Channel 2 volume
D4
C1V4
0
D3
C1V3
0
D2
C1V2
0
D1
C1V1
0
D0
C1V0
0
D7
C2V7
0
D6
C2V6
1
D5
C2V5
1
D4
C2V4
0
D3
C2V3
0
D2
C2V2
0
D1
C2V1
0
D0
C2V0
0
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