STFPC320 查看數據表（PDF） - STMicroelectronics

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STFPC320

Front panel controller/driver with standby power management and real-time clock

STMicroelectronics 

STFPC320

Normal display memory locations

12 Normal display memory locations

Table 12. Display RAM address and display mode

Seg1

Seg4

Seg8

Seg12

Seg16

10 HL

10 HU

11 HL

11 HU

13 HL

13 HU

14 HL

14 HU

16 HL

16 HU

17 HL

17 HU

19 HL

19 HU

1A HL

1A HU

1C HL

1C HU

1D HL

1D HU

1F HL

1F HU

20 HL

20 HU

22 HL

22 HU

23 HL

23 HU

25 HL

25 HU

26 HL

26 HU

28 HL

28 HU

29 HL

29 HU

2B HL

2B HU

2C HL

2C HU

2E HL

2E HU

2F HL

2F HU

31 HL

31 HU

32 HL

32 HU

34 HL

34 HU

35 HL

35 HU

37 HL

37 HU

38 HL

38 HU

3A HL

3A HU

3B HL

3B HU

3D HL

3D HU

3E HL

3E HU

Seg20

12 HL

15 HL

18 HL

1B HL

1E HL

21 HL

24 HL

27 HL

2A HL

2D HL

30 HL

33 HL

36 HL

39 HL

3C HL

3F HL

b7

b4 b3

b0

XX HL

XX HU

Higher 4 bits Lower 4 bits

DIG1

DIG2

DIG3

DIG4

DIG5

DIG6

DIG7

DIG8

DIG9

DIG10

DIG11

DIG12

DIG13

DIG14

DIG15

DIG16

Only the lower 4 bits of the addresses assigned to Seg17 through Seg20 are valid, the higher

4 bits are ignored.

Note that the common grid/segment outputs are grid-based. The grid has to be enabled

before any segments can be turned on. If data is written for a segment before enabling the

respective grid, nothing is present on the display.

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