STV0680 查看數據表（PDF） - STMicroelectronics
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STV0680 Datasheet PDF : 63 Pages
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STV0680B+ VV6410/6411/6500
VV6500 pinout information and package dimensions
Name
Pin Number Type
Description
Digital video interface
D[4]
36
D[3]
35
D[2]
34
D[1]
33
D[0]
32
QCK
42
CLKIN
40
LST/D[5]
37
FST/D[6]
38
D[7]
41
OEB
20
Digital control signals
ODT
Tri-stateable 5-wire output data bus.
- D[4] is the most significant bit.
- D[4:0] have programmable drive strengths 2, 4 and 6 mA
ODT
BI↑
ODT
ODT
ODT
ID↓
Tri-stateable data qualification clock.
LVDS negative Clock input
Tri-stateable Line start output
May be configured as tri-stateable output data bit 5 D[5].
Tri-stateable Frame start signal.
May be configured as tri-stateable output data bit 6 D[6].
Tri-stateable Data wire (ms data bit).
May be configured as tri-stateable output data bit 6 D[6].
Digital output (tri-state) enable.
RESETB
31
SUSPEND
31
Serial interface
SCL
18
SDA
17
System clocks
CLKI/CLKIP 39
Not connected
ID↑
System Reset. Active Low.
May be configured as System Sync. Active Low.
ID↑
USB Suspend Mode Control signal. Active High
If this feature is not required then the support circuit must pull the pin to
ground. The combination of an active high signal and pull up pad was
chosen to limit current drawn by the device while in suspend mode.
BI↑
Serial bus clock (input only).
BI↑
Serial bus data (bidirectional, open drain).
ID↓
Schmitt Buffered Clock input or LVDS positive Clock input
NC
2, 7, 8, 10,13,
Not connected
14, 19, 22-28,
48
Table 21 : VV6500 pin description
Key
A
OA
BI
BI↑
BI↓
Analogue Input
Analogue Output
Bidirectional
Bidirectional with internal pull-up
Bidirectional with internal pull-down
D
ID↑
ID↓
OD
ODT
Digital Input
Digital input with internal pull-up
Digital input with internal pull-down
Digital Output
Tri-stateable Digital Output
Version 3.4
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