T89C51RD2-3CSIM 查看數據表（PDF） - Atmel Corporation
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T89C51RD2-3CSIM Datasheet PDF : 104 Pages
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4243G–8051–05/03
T89C51RD2
Table 25. IPH Register
IPH - Interrupt Priority High Register (B7h)
7
6
5
4
-
PPCH
PT2H
PSH
3
PT1H
2
PX1H
1
PT0H
Bit
Bit
Number Mnemonic
Description
7
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
PCA interrupt priority bit high.
PPCH PPC
Priority Level
0
0
Lowest
6
PPCH
01
10
11
Highest
Timer 2 overflow interrupt Priority High bit
PT2H PT2 Priority Level
5
PT2H
0 0 Lowest
01
10
1 1 Highest
Serial port Priority High bit
PSH PS Priority Level
4
PSH
0 0 Lowest
01
10
1 1 Highest
Timer 1 overflow interrupt Priority High bit
PT1H PT1 Priority Level
3
PT1H
0 0 Lowest
01
10
1 1 Highest
External interrupt 1 Priority High bit
PX1H PX1 Priority Level
2
PX1H
0 0 Lowest
01
10
1 1 Highest
Timer 0 overflow interrupt Priority High bit
PT0H PT0
Priority Level
1
PT0H
00
01
Lowest
10
11
Highest
External interrupt 0 Priority High bit
PX0H PX0
Priority Level
0
PX0H
00
01
Lowest
10
11
Highest
Reset Value = X000 0000b
Not bit addressable
0
PX0H
41
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