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Z86E6116PSC(2008) 查看數據表(PDF) - Zilog

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Z86E6116PSC
(Rev.:2008)
Zilog
Zilog 
Z86E6116PSC Datasheet PDF : 69 Pages
First Prev 61 62 63 64 65 66 67 68 69
Z86E61/E63
CMOS Z8 16K/32K EPROM Microcontroller
60
Table 32. Instruction Summary (Continued)
Instruction
and Operation
RPsrc
STOP
SUB dst, src
dstdstsrc
SWAP dst
7
07
0
TCM dst, src
(NOT dst)
AND src
TM dst, src
dst AND src
XOR dst, src
dstdst
XOR src
Address Mode
dst
src
Opcode
Flags Affected
Byte (Hex) C Z S V D H
Notea
6F
1-
-
-
-
-
2[ ]
[
[
[
[
1[
R
IR
Notea
F0
X*
*
X-
-
F1
6[ ]
-
*
*
0-
-
Notea
Notea
7[ ]
-
*
*
0-
-
B[ ]
-
*
*
0-
-
a. These instructions have an identical set of addressing modes, which are encoded for brevity. The first Op
Code nibble is found in the instruction set table above. The second nibble is expressed symbolically by a
’[ ]’ in this table, and its value is found in the following table to the left of the applicable addressing mode pair.
For example, the opcode of an ADC instruction using the addressing modes r (destination) and Ir (source)
is 13.
Address Mode
dst
src
r
r
r
Ir
R
R
R
IR
R
IM
IR
IM
Lower
Opcode Nibble
[2]
[3]
[4]
[5]
[6]
[7]
PS014401-1001

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