Z86E4416FSC 查看數據表（PDF） - Zilog

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Z86E4416FSC

CMOS Z8® OTP Microcontrollers

Zilog 

CMOS Z8® OTP Microcontrollers

Product Specification

60

from STOP mode when programmed as analog inputs. When the Stop Mode Recovery

sources are selected in this register then SMR2 register bits D0, D1 must be set to zero.

Note: If the Port 2 pin is configured as an output, this output level will be

read by the SMR circuitry.

SMR D1 D0

00

VDD

P20

P23

SMR2 D1 D0

01

P20

P23

SMR2 D1 D0

10

SMR D4 D3 D2

0 00

VDD

P30

P31

P32

SMR D4 D3 D2 SMR D4 D3 D2 SMR D4 D3 D2

00 1

100

1 01

01 0

01 1

P20

P33

P27

P23

SMR D4 D3 D2

1 10

P20

P27

STOP-Mode Recovery Edge

Select (SMR)

P33 from Pads

SMR D4 D3 D2

1 11

To POR

RESET

MUX

To P33 Data

Latch and IRQ1

Digital/Analog Mode

Select (P3M)

Figure 32. Stop Mode Recovery Source

PS022901-0508

Electrical Characteristics

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