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XRT75L03DIV 查看數據表(PDF) - Exar Corporation

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XRT75L03DIV Datasheet PDF : 134 Pages
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XRT75L03D
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REV. 1.0.0 THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
BIT NUMBER
1
NAME
TxCLKINV
0
TxLEV
TYPE
R/W
R/W
DEFAULT
VALUE
DESCRIPTION
0
Transmit Clock Invert Select - Channel_n:
This READ/WRITE bit-field is used to select the edge of
the TxCLK_n input that the Transmit Section of Channel_n
will use to sample the TPDATA_n and TNDATA_n input
pins, as described below.
0 - Configures the Transmit Section (within the correspond-
ing channel) to sample the TPDATA_n and TNDATA_n
input pins upon the falling edge of TxCLK_n.
1 - Configures the Transmit Section (within the correspond-
ing channel) to sample the TPDATA_n and TNDATA_n
input pins upon the rising edge of TxCLK_n.
NOTE: Whenever this configuration setting is
accomplished via the Host Mode, it is done on a
per-channel basis.
0
Transmit Line Build-Out Select - Channel_n:
This READ/WRITE bit-field is used to either enable or dis-
able the Transmit Line Build-Out (e.g., pulse-shaping) cir-
cuit within the corresponding channel. The user should set
this bit-field to either "0" or to "1" based upon the following
guidelines.
0 - If the cable length between the Transmit Output (of the
corresponding Channel) and the DSX-3/STSX-1 location is
225 feet or less.
1 - If the cable length between the Transmit Output (of the
corresponding Channel) and the DSX-3/STSX-1 location is
225 feet or more.
The user must follow these guidelines in order to insure
that the Transmit Section (of Channel_n) will always gener-
ate a DS3 pulse that complies with the Isolated Pulse Tem-
plate requirements per Bellcore GR-499-CORE, or an
STS-1 pulse that complies with the Pulse Template
requirements per Telcordia GR-253-CORE.
NOTE: This bit-field is ignored if the channel has been
configured to operate in the E3 Mode.
77

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