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XRT83SL30IV(2003) 查看數據表(PDF) - Exar Corporation

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XRT83SL30IV Datasheet PDF : 76 Pages
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XRT83SL30
SINGLE-CHANNEL T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
PRELIMINARY
REV. P1.0.4
FIGURE 13. SIMPLIFIED DIAGRAM FOR E1 IN EXTERNAL TERMINATION MODE (RXTSEL= 0)
XRT83SL30 LIU
9.1
1:2
TTIP
TRING
RTIP
9.1
75
RRING
1:1
75
75
TRANSMITTER
TRANSMIT TERMINATION MODE
In Hardware mode, TXTSEL (Pin 45) can be tied “High” to select internal termination mode or tied “Low” for
external termination. In Host mode, bit 6 in the appropriate register is set “High” to select the internal
termination mode for the transmit channel, see Table 19, “Microprocessor Register #1 bit description,” on
page 44.
TABLE 8: TRANSMIT TERMINATION CONTROL
TXTSEL
0
1
TX TERMINATION
EXTERNAL
INTERNAL
TX TRANSFORMER RATIO
1:2.45
1:2
For internal termination, the transformer turns ratio is always 1:2. In internal mode, no external resistors are
used. An external capacitor of 0.68µF is used for proper operation of the internal termination circuitry, see
Figure 11.
TABLE 9: TERMINATION SELECT CONTROL
TERSEL1
0
0
1
1
TERSEL0
0
1
0
1
TERMINATION
100
110
75
120
EXTERNAL TRANSMIT TERMINATION MODE
By default the XRT83SL30 is set for external termination mode at power up or at Hardware reset.
When external transmit termination mode is selected, the internal termination circuitry is disabled. The value of
the external resistors is chosen for a specific application according to the turns ratio selected by TRATIO (Pin
26) in Hardware mode or bit 0 in the appropriate register in Host mode, see Table 10 and Table 21,
“Microprocessor Register #3 bit description,” on page 49. Figure 12 is a simplified block diagram for T1 (100)
in the external termination mode. Figure 13 is a simplified block diagram for E1 (75) in the external
termination mode.
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