Z8038018FSC 查看數據表（PDF） - Zilog

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Z8038018FSC

MICROPROCESSOR

Zilog 

ZILOG

I/O Transactions

I/O transactions move data to or from an external periph-

eral when the Z380 MPU performs an I/O access. All I/O

transactions occur referenced to the IOCLK signal, when

it is a divided-down version of the BUSCLK signal. BUSCLK

may be divided by a factor of from two to eight to form the

MICROPROCESSOR

IOCLK, under program control. An example of this division

is shown, for the four possible divisors, in Figure 7. Note

that the IOCLK divider is synchronized (i.e., starts with a

known timing relationship) at the trailing edge of /RESET.

This is discussed in the Reset Section.

BUSCLK

IOCLK (X2)

IOCLK (X4)

IOCLK (X6)

IOCLK (X8)

Figure 7. IOCLK Timing

PS010001-0301

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