Z8934050FSC 查看數據表（PDF） - Zilog

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Z8934050FSC

DIGITAL WAVETABLE ENGINE

Zilog 

Z89340

Digital Wavetable Engine

PIN FUNCTIONS (Continued)

ISA_MEMW (I/O). ISA Memory Write.

ISA_SA_0–4 (I/O). ISA Address Bus.

ISA_SD_08–15 (I/O). Data Bus. This data bus is used to

transfer data between PC and the Z89340. The lines map

directly to the PC data bus; the pins should be connected

to the ISA bus address lines of the same name.

MIDI_RX (Input). Receives data from MIDI interface.

MIDI_TX (Output). Sends data to MIDI interface.

MODE_S0–3 (Input). Mode Selection pins that are general

purpose input pins.

DRAM_OE (Output). External DRAM Output Enable. This

signal is an output enable strobe for external DRAM.

DRAM_WE (Output). External DRAM Write Enable. This

signal is a write enable strobe for external DRAM.

RAS (Output). Row Address Strobe Output. This memory

address strobe is used in conjunction with the address

lines ROMADD01–R0MADD23.

RESET. (Input). Device Reset.

ROMADD01–ROMADD23 (Output). Wavetable ROM Ad-

dress Bus. These lines are used to address external sam-

ple memory.

VCC. Power supply that connects to 5V ±5%.

Wave_Data_0E (Output). External Memory Output En-

able. This signal is an output enable strobe for external

sample memory.

Wave_Data_00-15 (I/O). Waveform Memory

DRAM/SRAM/ROM Data Bus. These lines are used to

pass sample data between the Z89340 and external sam-

ple memory.

1-13

PRELIMINARY

DS96DSP0201

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