PIC16LC558T-04/SO 查看數據表（PDF） - Microchip Technology

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PIC16LC558T-04/SO

ERROM-based 8-Bit CMOS microcontroller

Microchip Technology 

PIC16C55X

4.2.2.3 INTCON Register

The INTCON register is a readable and writable

register which contains the various enable and flag bits

for all interrupt sources.

Note:

Interrupt flag bits get set when an interrupt

condition occurs regardless of the state of

its corresponding enable bit or the global

enable bit, GIE (INTCON<7>).

REGISTER 4-3:

INTCON REGISTER (ADDRESS 0BH OR 8BH)

R/W-0 Reserved R/W-0 R/W-0 R/W-0

GIE

—

T0IE

INTE

RBIE

bit7

R/W-0

T0IF

R/W-0

INTF

R/W-x

RBIF

bit0

bit 7

GIE: Global Interrupt Enable bit

1 = Enables all un-masked interrupts

0 = Disables all interrupts

bit 6

Reserved: For future use. Always maintain this bit clear.

bit 5

T0IE: TMR0 Overflow Interrupt Enable bit

1 = Enables the TMR0 interrupt

0 = Disables the TMR0 interrupt

bit 4

INTE: RB0/INT External Interrupt Enable bit

1 = Enables the RB0/INT external interrupt

0 = Disables the RB0/INT external interrupt

bit 3

RBIE: RB Port Change Interrupt Enable bit

1 = Enables the RB port change interrupt

0 = Disables the RB port change interrupt

bit 2

T0IF: TMR0 Overflow Interrupt Flag bit

1 = TMR0 register has overflowed (must be cleared in software)

0 = TMR0 register did not overflow

bit 1

INTF: RB0/INT External Interrupt Flag bit

1 = The RB0/INT external interrupt occurred (must be cleared in software)

0 = The RB0/INT external interrupt did not occur

bit 0

RBIF: RB Port Change Interrupt Flag bit

1 = When at least one of the RB7:RB4 pins changed state (must be cleared in software)

0 = None of the RB7:RB4 pins have changed state

Legend:

R = Readable bit

- n = Value at POR reset

W = Writable bit

’1’ = Bit is set

U = Unimplemented bit, read as ‘0’

’0’ = Bit is cleared x = Bit is unknown

 2002 Microchip Technology Inc.

Preliminary

DS40143D-page 19

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