PSD4256G6V-12UT 查看數據表（PDF） - STMicroelectronics
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PSD4256G6V-12UT
STMicroelectronics
PSD4256G6V-12UT Datasheet PDF : 89 Pages
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PSD4235G2
Table 30. Status Bits
DQ7
DQ6
DQ5
Data Polling Toggle Flag Error Flag
DQ4
X
DQ3
Erase Time-
out
DQ2
X
DQ1
X
DQ0
X
Table 31. Status Bits for Motorola
DQ15
DQ14
DQ13
DQ12
Data Polling Toggle Flag Error Flag
X
Note: 1. X = Not guaranteed value, can be read either 1 or 0.
2. DQ15-DQ0 represent the Data Bus bits, D15-D0.
3. FS0-FS7/CSBOOT0-CSBOOT3 are active High.
Data Polling (DQ7) – DQ15 for Motorola.
When erasing or programming in Flash memory,
the Data Polling (DQ7/DQ15) bit outputs the com-
plement of the bit being entered for programming/
writing on the DQ7/DQ15 bit. Once the Program
instruction or the Write operation is completed, the
true logic value is read on the Data Polling (DQ7/
DQ15) bit (in a Read operation).
s Data Polling is effective after the fourth Write
pulse (for a Program instruction) or after the
sixth Write pulse (for an Erase instruction). It
must be performed at the address being
programmed or at an address within the Flash
memory sector being erased.
s During an Erase cycle, the Data Polling (DQ7/
DQ15) bit outputs a 0. After completion of the
cycle, the Data Polling (DQ7/DQ15) bit outputs
the last bit programmed (it is a 1 after erasing).
s If the location to be programmed is in a
protected Flash memory sector, the instruction
is ignored.
s If all the Flash memory sectors to be erased are
protected, the Data Polling (DQ7/DQ15) bit is
reset to 0 for about 100 µs, and then returns to
the value from the previously addressed
location. No erasure is performed.
Toggle Flag (DQ6) – DQ14 for Motorola. The
PSD offers another way for determining when the
Flash memory Program cycle is completed. During
the internal Write operation and when either FS0-
FS7 or CSBOOT0-CSBOOT3 is true, the Toggle
Flag (DQ6/DQ14) bit toggles from 0 to 1 and 1 to
0 on subsequent attempts to read any word of the
memory.
When the internal cycle is complete, the toggling
stops and the data read on the Data Bus D0-D7 is
the value from the addressed memory location.
The device is now accessible for a new Read or
DQ11
Erase Time-
out
DQ10
X
DQ9
X
DQ8
X
Write operation. The cycle is finished when two
successive Reads yield the same output data.
s The Toggle Flag (DQ6/DQ14) bit is effective
after the fourth Write pulse (for a Program
instruction) or after the sixth Write pulse (for an
Erase instruction).
s If the location to be programmed belongs to a
protected Flash memory sector, the instruction
is ignored.
s If all the Flash memory sectors selected for
erasure are protected, the Toggle Flag (DQ6/
DQ14) bit toggles to 0 for about 100 µs and then
returns to the value from the previously
addressed location.
Error Flag (DQ5) – DQ13 for Motorola. During
a normal Program or Erase cycle, the Error Flag
(DQ5/DQ13) bit is reset to 0. This bit is set to 1
when there is a failure during a Flash memory Pro-
gram, Sector Erase, or Bulk Erase cycle.
In the case of Flash memory programming, the Er-
ror Flag (DQ5/DQ13) bit indicates the attempt to
program a Flash memory bit, or bits, from the pro-
grammed state, 0, to the erased state, 1, which is
not a valid operation. The Error Flag (DQ5/DQ13)
bit may also indicate a Time-out condition while at-
tempting to program a word.
In case of an error in a Flash memory Sector Erase
or Word Program cycle, the Flash memory sector
in which the error occurred or to which the pro-
grammed location belongs must no longer be
used. Other Flash memory sectors may still be
used. The Error Flag (DQ5/DQ13) bit is reset after
a Reset instruction. A Reset instruction is required
after detecting an error on the Error Flag (DQ5/
DQ13) bit.
Erase Time-out Flag (DQ3) – DQ11 for Motoro-
la. The Erase Time-out Flag (DQ3/DQ11) bit re-
flects the time-out period allowed between two
consecutive Sector Erase instructions. The Erase
Time-out Flag (DQ3/DQ11) bit is reset to 0 after a
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