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PSD4246G3V-12UIT 查看數據表(PDF) - STMicroelectronics

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PSD4246G3V-12UIT Datasheet PDF : 89 Pages
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PSD4235G2
Figure 15. CPLD Output Macrocell
MASK
REG.
MACROCELL CS
RD
INTERNAL DATA BUS
WR
PT
ALLOCATOR
ENABLE (.OE)
PRESET(.PR)
PT
PT
PT
PT CLK
CLKIN
POLARITY
SELECT
CLEAR (.RE)
MUX
COMB/REG
SELECT
DIN PR
LD
Q
IN
MUX
CLR
PROGRAMMABLE
FF (D/T/JK /SR)
DIRECTION
REGISTER
PORT
DRIVER
I/O PIN
FEEDBACK (.FB)
PORT INPUT
INPUT
MACROCELL
Product Term Allocator. The CPLD has a Prod-
uct Term Allocator. PSDsoft Express, uses the
Product Term Allocator to borrow and place prod-
uct terms from one Macrocell to another. The fol-
lowing list summarizes how product terms are
allocated:
s McellA0-McellA7 all have three native product
terms and may borrow up to six more
s McellB0-McellB3 all have four native product
terms and may borrow up to five more
s McellB4-McellB7 all have four native product
terms and may borrow up to six more.
Each Macrocell may only borrow product terms
from certain other Macrocells. Product terms al-
ready in use by one Macrocell are not available for
another Macrocell.
If an equation requires more product terms than
are available to it, then “external” product terms
are required, which consume other Output Macro-
cells (OMC). If external product terms are used,
extra delay is added for the equation that required
the extra product terms. This is called product term
expansion. PSDsoft Express performs this expan-
sion as needed.
AI04946
Loading and Reading the Output Macrocells
(OMC). The Output Macrocells (OMC) block oc-
cupies a memory location in the MCU address
space, as defined by the CSIOP (see the section
entitled “I/O Ports”, on page 50). The flip-flops in
each of the 16 Output Macrocells (OMC) can be
loaded from the data bus by a MCU. Loading the
Output Macrocells (OMC) with data from the MCU
takes priority over internal functions. As such, the
preset, clear, and clock inputs to the flip-flop can
be overridden by the MCU. The ability to load the
flip-flops and read them back is useful in such ap-
plications as loadable counters and shift registers,
mailboxes, and handshaking protocols.
Data is loaded to the Output Macrocells (OMC) on
the trailing edge of Write Strobe (WR/WRL,
CNTL0).
The OMC Mask Register. There is one Mask
Register for each of the two groups of eight Output
Macrocells (OMC). The Mask Registers can be
used to block the loading of data to individual Out-
put Macrocells (OMC). The default value for the
Mask Registers is 00h, which allows loading of the
Output Macrocells (OMC). When a given bit in a
Mask Register is set to a 1, the MCU is blocked
from writing to the associated Output Macrocells
36/89

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