Z8C520SSC 查看數據表（PDF） - Zilog

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Z8C520SSC

1.5 MBPS USB LOW-POWER DEVICE CONTROLLER FOR MULTIPROTOCOL POINTING DEVICES

Zilog 

Z8E520/C520

1.5 MBPS USB Device Controller

PORT CONFIGURATION REGISTERS

Zilog

ADDR NAME

D7

PORT A

D0

CONFIG

01

WAKE

PORT A

D1

CONFIG

23

WAKE

PORT A

D2

CONFIG

45

WAKE

PORT A

D3

CONFIG

67

WAKE

PORT B

D4

CONFIG

01

WAKE

PORT B

D5 CONFIG

23

WAKE

PORT B

D6

CONFIG

45

WAKE

PORT B

D7

CONFIG

67

PORT A

D8

SINK

45

PORT A

D9

SINK

67

DA PORT B0 COMP

ENABLE

DB

PORT B1 COMP

ENABLE

DC PORT B2 COMP

ENABLE

DD PORT B3 COMP

ENABLE

DE PORT B4 COMP

ENABLE

DF PORT B5 COMP

ENABLE

D6

D5

D4

D3

A0

PUSH/

PULL

PULLDWN

ON

OUTPUT

A2

PUSH/ PULLUP

PULL

ON

A4

OUTPUT

PUSH/ PULLUP

PULL

ON

A6

OUTPUT

PUSH/ PULLUP

PULL

ON

B0

OUTPUT

PUSH/ PULLUP

PULL

ON

B2

PUSH/ PULLUP

PULL

ON

B4

PUSH/ PULLUP

PULL

ON

B6

OUTPUT

OUTPUT

OUTPUT

WAKE

WAKE

WAKE

WAKE

WAKE

WAKE

WAKE

PUSH/ PULLUP

PULL

ON

A5

OUTPUT

SINK 3:0

A7

SINK 3:0

B0

VREF 5:4

B1

VREF 5:4

B2

VREF 5:4

B3

VREF 5:4

B4

VREF 5:4

B5

VREF 5:4

D2

D1

D0

A1

PUSH/ PULLDWN

PULL

ON OUTPUT

A3

PUSH/ PULLDWN

PULL

ON

OUTPUT

A5

PUSH/ PULLUP

PULL

ON

OUTPUT

A7

PUSH/ PULLUP

PULL

ON

OUTPUT

B1

PUSH/ PULLUP

PULL

ON

B3

PUSH/ PULLUP

PULL

ON

B5

PUSH/ PULLUP

PULL

ON

B7

OUTPUT

OUTPUT

OUTPUT

PUSH/ PULLUP

PULL

ON

OUTPUT

A4

SINK 3:0

A6

SINK 3:0

DIVIDER 2:0

DIVIDER 2:0

DIVIDER 2:0

DIVIDER 2:0

DIVIDER 2:0

DIVIDER 2:0

Figure 17. Port Configuration Registers ( D0–DF)

30

PRELIMINARY

DS97KEY2005

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