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ST72411R 查看數據表(PDF) - STMicroelectronics

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ST72411R Datasheet PDF : 71 Pages
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ST72411R
LCD DRIVER (Cont’d)
5.4.6 Register Description
CONTROL REGISTER (CR)
Read / Write
Reset Value: 0000 0000 (00h)
7
6
5
4
3
2
1
0
-
-
-
-
FS2 FS1 FS0 LCDE
Bit 7:4 = Reserved, Must always be cleared
Bit 3:1 = FS2:0 Frame Frequency selection
These bits allow to select the LCD frame frequen-
cy. It controls the ratio between the input clock
(fOSC/2) and the LCD output clock (fLCD). These
bits are set and cleared by software.
Ration Divider
1/16384
1/8192
1/4096
1/2048
1/1024
1/512
1/256
1/128
FS2
FS1
FS0
1
1
1
1
1
0
1
0
1
1
0
0
0
1
1
0
1
0
0
0
1
0
0
0
5.4.7 LCD RAM Description
The 16-byte LCD RAM is located in memory from
address 0140h to address 014Fh. Each bit of the
LCD RAM is mapped to one picture element of the
LCD panel. If a bit is set, the corresponding picture
element is switched on, otherwise it is switched
off.
After reset, the LCD RAM is not initialized and its
content is indeterminate.
Addr. 7 6 5 4 3 2 1 0
0140h S7 S6 S5 S4 S3 S2 S1 S0
0141h S15 S14 S13 S12 S11 S10 S9 S8
0142h S23 S22 S21 S20 S19 S18 S17 S16
0143h S31 S30 S29 S28 S27 S26 S25 S24
0144h S7 S6 S5 S4 S3 S2 S1 S0
0145h S15 S14 S13 S12 S11 S10 S9 S8
0146h S23 S22 S21 S20 S19 S18 S17 S16
0147h S31 S30 S29 S28 S27 S26 S25 S24
0148h S7 S6 S5 S4 S3 S2 S1 S0
0149h S15 S14 S13 S12 S11 S10 S9 S8
014Ah S23 S22 S21 S20 S19 S18 S17 S16
014Bh S31 S30 S29 S28 S27 S26 S25 S24
014Ch S7 S6 S5 S4 S3 S2 S1 S0
014Dh S15 S14 S13 S12 S11 S10 S9 S8
014Eh S23 S22 S21 S20 S19 S18 S17 S16
014Fh S31 S30 S29 S28 S27 S26 S25 S24
Bit 0 = LCDE LCD enable
This bit is set and cleared by software.
0: LCD disabled
1: LCD enabled
While the LCD is disabled (LCDE bit cleared), all
Segment and Common pins are high impedance.
44/71

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