STM32F217REH6V 查看數據表（PDF） - STMicroelectronics

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STM32F217REH6V

ARM-based 32-bit MCU, 150DMIPs, up to 1 MB Flash/128+4KB RAM, crypto, USB OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 15 comm. interfaces & camera

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Electrical characteristics

STM32F21xxx

Figure 54. Asynchronous non-multiplexed SRAM/PSRAM/NOR write waveforms

FSMC_NEx

tw(NE)

FSMC_NOE

FSMC_NWE

FSMC_A[25:0]

FSMC_NBL[1:0]

FSMC_D[15:0]

FSMC_NADV(1)

tv(NWE_NE)

tw(NWE)

tv(A_NE)

tv(BL_NE)

tv(Data_NE)

t v(NADV_NE)

tw(NADV)

th(A_NWE)

Address

th(BL_NWE)

NBL

th(Data_NWE)

Data

t h(NE_NWE)

ai14990

1. Mode 2/B, C and D only. In Mode 1, FSMC_NADV is not used.

Table 70. Asynchronous non-multiplexed SRAM/PSRAM/NOR write timings(1)(2)

Symbol

Parameter

Min

Max

Unit

tw(NE)

FSMC_NE low time

3THCLK

3THCLK+ 4

ns

tv(NWE_NE) FSMC_NEx low to FSMC_NWE low

THCLK– 0.5 THCLK+ 0.5

ns

tw(NWE) FSMC_NWE low time

THCLK– 0.5 THCLK+ 3

ns

th(NE_NWE)

FSMC_NWE high to FSMC_NE high hold

time

THCLK

-

ns

tv(A_NE) FSMC_NEx low to FSMC_A valid

-

0

ns

th(A_NWE) Address hold time after FSMC_NWE high THCLK- 3

-

ns

tv(BL_NE) FSMC_NEx low to FSMC_BL valid

-

0.5

ns

th(BL_NWE)

FSMC_BL hold time after FSMC_NWE

high

THCLK– 1

-

ns

tv(Data_NE) Data to FSMC_NEx low to Data valid

-

THCLK+ 5

ns

th(Data_NWE) Data hold time after FSMC_NWE high

THCLK+0.5

-

ns

tv(NADV_NE) FSMC_NEx low to FSMC_NADV low

-

2

ns

tw(NADV) FSMC_NADV low time

-

THCLK+ 1.5

ns

1. CL = 30 pF.

2. Based on characterization, not tested in production.

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Doc ID 17050 Rev 8

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