STM32F215RET6 查看數據表（PDF） - STMicroelectronics
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STM32F215RET6 Datasheet PDF : 173 Pages
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Revision history
STM32F21xxx
Table 92. Document revision history (continued)
Date
Revision
Changes
22-Apr-2011
Changed datasheet status to “Full Datasheet”.
APB1 frequency changed form 36 MHz to 30 MHz.
Introduced concept of SRAM1 and SRAM2.
LQFP176 now in production.
Removed WLCSP64+2 package.
Updated Figure 3: Compatible board design between STM32F10xx
and STM32F2xx for LQFP144 package and Figure 2: Compatible
board design between STM32F10xx and STM32F2xx for LQFP100
package.
Added camera interface for STM32F217Vx devices in Table 2:
STM32F215xx and STM32F217xx: features and peripheral counts.
Removed 16 MHz internal RC oscillator accuracy in Section 2.2.12:
Clocks and startup.
Updated Section 2.2.16: Voltage regulator.
Modified I2S sampling frequency range in Section 2.2.12: Clocks
and startup, Section 2.2.24: Inter-integrated sound (I2S), and
Section 2.2.30: Audio PLL (PLLI2S).
Updated Section 2.2.17: Real-time clock (RTC), backup SRAM and
backup registers and description of TIM2 and TIM5 in Section :
General-purpose timers (TIMx).
Modified maximum baud rate (oversampling by 16) for USART1 in
Table 4: USART feature comparison.
Updated note related to RFU pin below Figure 9: STM32F21x
LQFP100 pinout, Figure 10: STM32F21x LQFP144 pinout, Figure 11:
4
STM32F21x LQFP176 pinout, Figure 12: STM32F21x UFBGA176
ballout, and Table 5: STM32F21x pin and ball definitions.
Added RTC_50Hz as PB15 alternate function, and TT (3.6 V tolerant
I/O) in Table 5: STM32F21x pin and ball definitions and Table 7:
Alternate function mapping.
PA15 added in Table 5: STM32F21x pin and ball definitions.
In Table 5: STM32F21x pin and ball definitions, changed I2S2_CK and
I2S3_CK to I2S2_SCK and I2S3_SCK, respectively.
Removed ETH _RMII_TX_CLK for PC3/AF11 in Table 7: Alternate
function mapping.
Updated Table 8: Voltage characteristics and Table 9: Current
characteristics.
TSTG updated to –65 to +150 in Table 10: Thermal characteristics.
Added CEXT and ESR in Table 11: General operating conditions as
well as Section 5.3.2: VCAP1/VCAP2 external capacitor.
Modified Note 3 in Table 12: Limitations depending on the operating
power supply range.
Updated Table 14: Operating conditions at power-up / power-down
(regulator ON), and Table 15: Operating conditions at power-up /
power-down (regulator OFF).
Updated notes below and added OSC_OUT pin in Figure 14: Pin
loading conditions. and Figure 15: Pin input voltage.
Updated VPVD, VBOR1, VBOR2, VBOR3, TRSTTEMPO typical value, and
IRUSH, added ERUSH and Note 3 in Table 16: Embedded reset and
power control block characteristics.
164/173
Doc ID 17050 Rev 8
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