ST7PLITE39F2U6TR 查看數據表（PDF） - STMicroelectronics

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ST7PLITE39F2U6TR

8-bit MCU with single voltage Flash, data EEPROM, ADC, timers, SPI, LINSCI™

STMicroelectronics 

ST7LITE3xF2

CONTROL PIN CHARACTERISTICS (Cont’d)

Figure 98. RESET pin protection when LVD is enabled.1)2)3)4)

VDD

ST72XXX

Required

EXTERNAL

RESET

Optional

(note 3)

0.01mF1MΩ

RON

Filter

PULSE

GENERATOR

Figure 99. RESET pin protection when LVD is disabled.1)

VDD

INTERNAL

RESET

WATCHDOG

ILLEGAL OPCODE 5)

LVD RESET

ST72XXX

USER

EXTERNAL

RESET

CIRCUIT

Required

0.01µF

RON

Filter

PULSE

GENERATOR

INTERNAL

RESET

WATCHDOG

ILLEGAL OPCODE 5)

Note 1:

– The reset network protects the device against parasitic resets.

– The output of the external reset circuit must have an open-drain output to drive the ST7 reset pad. Otherwise the

device can be damaged when the ST7 generates an internal reset (LVD or watchdog).

– Whatever the reset source is (internal or external), the user must ensure that the level on the RESET pin can go

below the VIL max. level specified in section 13.9.1 on page 153. Otherwise the reset will not be taken into account

internally.

– Because the reset circuit is designed to allow the internal RESET to be output in the RESET pin, the user must en-

sure that the current sunk on the RESET pin is less than the absolute maximum value specified for IINJ(RESET) in

section 13.2.2 on page 132.

Note 2: When the LVD is enabled, it is recommended not to connect a pull-up resistor or capacitor. A 10nF pull-down

capacitor is required to filter noise on the reset line.

Note 3: In case a capacitive power supply is used, it is recommended to connect a 1MΩ pull-down resistor to the RESET

pin to discharge any residual voltage induced by the capacitive effect of the power supply (this will add 5µA to the power

consumption of the MCU).

Note 4: Tips when using the LVD:

– 1. Check that all recommendations related to ICCCLK and reset circuit have been applied (see caution in Table 2

on page 7 and notes above)

– 2. Check that the power supply is properly decoupled (100nF + 10µF close to the MCU). Refer to AN1709 and

AN2017. If this cannot be done, it is recommended to put a 100nF + 1MΩ pull-down on the RESET pin.

– 3. The capacitors connected on the RESET pin and also the power supply are key to avoid any start-up marginality.

In most cases, steps 1 and 2 above are sufficient for a robust solution. Otherwise: replace 10nF pull-down on the

RESET pin with a 5µF to 20µF capacitor.”

Note 5: Please refer to “Illegal Opcode Reset” on page 128 for more details on illegal opcode reset conditions.

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