LFSC3GA25E-6FCN1704C 查看數據表（PDF） - Lattice Semiconductor

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LFSC3GA25E-6FCN1704C

LatticeSC/M Family Data Sheet Introduction

Lattice Semiconductor 

Lattice Semiconductor

DC and Switching Characteristics

LatticeSC/M Family Data Sheet

Power Supply Ramp Rates

Symbol

Parameter

Condition

tRAMP

Power supply ramp rates for all power supplies

Over process, voltage,

temperature

1. See the Power-up and Power-Down requirements section for more details on power sequencing.

2. From 0.5V to minimum operating voltage.

Min.

3.45

—

Typ.

—

—

Max Units

— mV/µs

75

ms

Hot Socketing Specifications1

Symbol

Parameter

Condition

Min. Typ. Max Units

IDK

Programmable and dedicated Input or I/O leakage

current2, 3, 4, 5, 6

0 <= VIN <= VIH (MAX) —

— ±1500 µA

IHDIN

SERDES average input current when device powered

down and inputs driven7

—

—

4

mA

1. See Hot Socket power up/down information in Chapter 2 of this document.

2. Assumes monotonic rise/fall rates for all power supplies.

3. Sensitive to power supply sequencing as described in hot socketing section.

4. Assumes power supplies are between 0 and maximum recommended operations conditions.

5. IDK is additive to IPU, IPD or IBH.

6. Represents DC conditions. For the first 20ns after hot insertion, current specification is 8 mA.

7. Assumes that the device is powered down with all supplies grounded, both P and N inputs driven by a CML driver with maximum allowed

VDDOB of 1.575V, 8b/10b data and internal AC coupling.

DC Electrical Characteristics5

Over Recommended Operating Conditions

Symbol

Parameter

Condition

Min.3

Typ.

Max. Units

IIL, IIH1

IPU

IPD

Input or I/O Low leakage 0 ≤ VIN ≤ VIH (MAX)

I/O Active Pull-up Current 0 ≤ VIN ≤ 0.7 VCCIO

I/O Active Pull-down Cur-

rent

VIL (MAX) ≤ VIN ≤ VIH (MAX)

—

—

10

µA

-30

—

-210 µA

30

—

210 µA

IBHLS

Bus Hold Low Sustaining

Current

VIN = VIL (MAX)

30

—

—

µA

IBHHS

Bus Hold High Sustaining

Current

VIN = 0.7VCCIO

-30

—

—

µA

IBHLO

Bus Hold Low Overdrive

Current

0 ≤ VIN ≤ VIH (MAX)

—

—

210 µA

IBHLH

Bus Hold High Overdrive

Current

0 ≤ VIN ≤ VIH (MAX)

—

—

-210 µA

ICL

PCI Low Clamp Current -3 < VIN ≤ -1

ICH

PCI High Clamp Current VCC + 4 > VIN ≥ VCC + 1

-25 + (VIN + 1)/0.015 —

25 + (VIN - VCC -1)/

0.015

—

—

mA

—

mA

VBHT Bus Hold trip Points

0 ≤ VIN ≤ VIH (MAX)

VIL (MAX)

—

VIH (MIN) V

VCCIO = 3.3V, 2.5V, 1.8V, 1.5V, 1.2V,

C1

I/O Capacitance2

VCC = 1.2V, VCCIP2 = 1.2V,

—

VCCAUX = 2.5, VIO = 0 to VIH (MAX)

8

—

pf

C32

Dedicated Input

Capacitance2

VCCIO = 3.3V, 2.5V, 1.8V, 1.5V, 1.2V,

VCC = 1.2V, VCCIP2 = 1.2V,

VCCAUX = 2.5, VIO = 0 to VIH (MAX)

—

6

—

pf

1. Input or I/O leakage current is measured with the pin configured as an input or as an I/O with the output driver tri-stated. It is not measured

with the output driver active. Bus maintenance circuits are disabled.

2. TA 25°C, f = 1.0MHz

3. IPU, IPD, IBHLS and IBHHS have minimum values of 15 or -15µA if VCCIO is set to 1.2V nominal.

4. This table does not apply to SERDES pins.

5. For programmable I/Os.

3-2

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