STM32F051C8U7(2012) 查看數據表（PDF） - STMicroelectronics

零件编号

产品描述 (功能)

生产厂家

STM32F051C8U7
(Rev.:2012)

Low- and medium-density advanced ARM™-based 32-bit MCU with 16 to 64 Kbytes Flash, timers, ADC, DAC and comm. interfaces

STMicroelectronics 

Electrical characteristics

STM32F051x

Table 50. I/O static characteristics (continued)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

VSS ≤ VIN ≤ VDD

I/O TC, FT and FTf

-

-

±0.1

VSS ≤ VIN ≤ VDD

2 V≤ VDD ≤ VDDA ≤ 3.6 V

-

I/O TTa used in digital

mode

-

±0.1

VIN= 5 V

I/O FT and FTf

-

Ilkg Input leakage current (3)

VIN= 3.6 V,

2 V≤ VDD ≤ VIN

VDDA = 3.6 V

-

I/O TTa used in digital

mode

-

10

µA

-

1

VSS ≤ VIN ≤ VDDA

2 V≤ VDD ≤ VDDA ≤ 3.6 V

-

I/O TTa used in analog

mode

-

±0.2

RPU

Weak pull-up equivalent

resistor(4)

VIN = VSS

30

40

50

kΩ

RPD

Weak pull-down

equivalent resistor(4)

VIN = VDD

30

40

50

kΩ

CIO I/O pin capacitance

-

5

-

pF

1. To sustain a voltage higher than VDD+0.3 the internal pull-up/pull-down resistors must be disabled.

2. Hysteresis voltage between Schmitt trigger switching levels. Data based on characterization, not tested in production.

3. Leakage could be higher than max. if negative current is injected on adjacent pins.

4. Pull-up and pull-down resistors are designed with a true resistance in series with a switchable PMOS/NMOS. This

MOS/NMOS contribution to the series resistance is minimum (~10% order).

All I/Os are CMOS and TTL compliant (no software configuration required). Their

characteristics cover more than the strict CMOS-technology or TTL parameters. The

coverage of these requirements is shown in Figure 16 and Figure 17 for standard I/Os, and

in Figure 18 and Figure 19 for 5 V tolerant I/Os.

70/105

Doc ID 022265 Rev 3

Share Link: