STM8S105S4(2015) 查看數據表（PDF） - STMicroelectronics

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STM8S105S4
(Rev.:2015)

Access line, 16 MHz STM8S 8-bit MCU, up to 32 Kbyte Flash, integrated EEPROM, 10-bit ADC, timers, UART, SPI, I²C

STMicroelectronics 

Interrupt vector mapping

7

Interrupt vector mapping

STM8S105x4/6

IRQ no.

-

-

0

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

Table 10. Interrupt mapping

Source block

Description

Wakeup from

halt mode

RESET

Reset

Yes

TRAP

Software interrupt -

TLI

External top level

interrupt

-

AWU

Auto wake up from

halt

-

CLK

Clock controller -

EXTI0

Port A external

interrupts

Yes(1)

EXTI1

Port B external

interrupts

Yes

EXTI2

Port C external

interrupts

Yes

EXTI3

Port D external

interrupts

Yes

EXTI4

Port E external

interrupts

Yes

Reserved

-

-

Reserved

-

-

SPI

End of transfer

Yes

TIM1

TIM1 update/

overflow/

underflow/ trigger/

-

break

TIM1

TIM1 capture/

compare

-

TIM2

TIM2 update/

overflow

-

TIM2

TIM2 capture/

compare

-

TIM3

TIM3 update/

overflow

-

TIM3

TIM3 capture/

compare

-

Reserved

-

-

Reserved

-

-

I2C

I2C interrupt

Yes

Wakeup from

active-halt mode

Vector address

Yes

0x00 8000

-

0x00 8004

-

0x00 8008

Yes

-

Yes(1)

0x00 800C

0x00 8010

0x00 8014

Yes

0x00 8018

Yes

0x00 801C

Yes

0x00 8020

Yes

0x00 8024

-

0x00 8028

-

0x00 802C

Yes

0x00 8030

-

0x00 8034

-

0x00 8038

-

0x00 803C

-

0x00 8040

-

0x00 8044

-

0x00 8048

-

0x00 804C

-

0x00 8050

Yes

0x00 8054

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