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STM8S105S6B3CTR 查看數據表(PDF) - STMicroelectronics

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STM8S105S6B3CTR Datasheet PDF : 127 Pages
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Product overview
STM8S105xx
Timer Counter Prescaler
size
(bits)
Counting CAPCOM Complem. Ext. Timer
mode channels outputs trigger synchronization/
chaining
TIM4 8
Any power of 2 from Up
0
1 to 128
0
No
4.13
Analog-to-digital converter (ADC1)
The STM8 family products contain a 10-bit successive approximation A/D converter (ADC1)
with up to 5 external multiplexed input channels and the following main features:
Input voltage range: 0 to VDD
Conversion time: 14 clock cycles
Single and continuous and buffered continuous conversion modes
Buffer size (n x 10 bits) where n = number of input channels
Scan mode for single and continuous conversion of a sequence of channels
Analog watchdog capability with programmable upper and lower thresholds
Analog watchdog interrupt
External trigger input
Trigger from TIM1 TRGO
End of conversion (EOC) interrupt
4.14
Communication interfaces
The following communication interfaces are implemented:
UART2: Full feature UART, synchronous mode, SPI master mode, Smartcard mode, IrDA
mode, LIN2.1 master/slave capability
SPI : Full and half-duplex, 8 Mbit/s
I²C: Up to 400 Kbit/s
4.14.1
UART2
Main features
One Mbit/s full duplex SCI
SPI emulation
High precision baud rate generator
Smartcard emulation
IrDA SIR encoder decoder
LIN master mode
LIN slave mode
18/127
DocID14771 Rev 9

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