PIC16F1503T-I 查看數據表（PDF） - Microchip Technology
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PIC16F1503T-I Datasheet PDF : 352 Pages
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PIC16(L)F1503
REGISTER 10-6: PMCON2: PROGRAM MEMORY CONTROL 2 REGISTER
W-0/0
bit 7
W-0/0
W-0/0
W-0/0
W-0/0
W-0/0
Program Memory Control Register 2
W-0/0
W-0/0
bit 0
Legend:
R = Readable bit
S = Bit can only be set
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7-0
Flash Memory Unlock Pattern bits
To unlock writes, a 55h must be written first, followed by an AAh, before setting the WR bit of the
PMCON1 register. The value written to this register is used to unlock the writes. There are specific
timing requirements on these writes.
TABLE 10-3: SUMMARY OF REGISTERS ASSOCIATED WITH FLASH PROGRAM MEMORY
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
INTCON
GIE
PEIE
TMR0IE
INTE
IOCIE
TMR0IF
INTF
IOCIF
PMCON1
—(1)
CFGS
LWLO
FREE
WRERR WREN
WR
RD
PMCON2
Program Memory Control Register 2
PMADRL
PMADRL<7:0>
PMADRH
PMDATL
—(1)
PMADRH<6:0>
PMDATL<7:0>
PMDATH
Legend:
Note 1:
—
—
PMDATH<5:0>
— = unimplemented location, read as ‘0’. Shaded cells are not used by Flash program memory.
Unimplemented, read as ‘1’.
Register on
Page
64
93
94
92
92
92
92
TABLE 10-4: SUMMARY OF CONFIGURATION WORD WITH RESETS
Name Bits Bit -/7 Bit -/6 Bit 13/5 Bit 12/4
Bit 11/3
Bit 10/2 Bit 9/1
Bit 8/0
13:8 —
CONFIG1
7:0 CP
—
—
MCLRE PWRTE
—
CLKOUTEN
WDTE<1:0>
BOREN<1:0>
—
—
FOSC<1:0>
13:8 —
CONFIG2
7:0
—
—
LVP
DEBUG
LPBOR
BORV STVREN
—
—
—
—
—
—
WRT<1:0>
Legend: — = unimplemented location, read as ‘0’. Shaded cells are not used by Resets.
Register
on Page
38
39
DS40001607D-page 94
2011-2015 Microchip Technology Inc.
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