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PIC32MX150F256L-I/PF 查看數據表(PDF) - Microchip Technology

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PIC32MX150F256L-I/PF Datasheet PDF : 382 Pages
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PIC32MX1XX/2XX/5XX 64/100-PIN FAMILY
REGISTER 10-11: U1CON: USB CONTROL REGISTER (CONTINUED)
bit 1 PPBRST: Ping-Pong Buffers Reset bit
1 = Reset all Even/Odd buffer pointers to the EVEN BD banks
0 = Even/Odd buffer pointers not being Reset
bit 0 USBEN: USB Module Enable bit(4)
1 = USB module and supporting circuitry enabled
0 = USB module and supporting circuitry disabled
SOFEN: SOF Enable bit(5)
1 = SOF token sent every 1 ms
0 = SOF token disabled
Note 1:
2:
3:
4:
5:
Software is required to check this bit before issuing another token command to the U1TOK register (see
Register 10-15).
All host control logic is reset any time that the value of this bit is toggled.
Software must set the RESUME bit for 10 ms if the part is a function, or for 25 ms if the part is a host, and
then clear it to enable remote wake-up. In Host mode, the USB module will append a low-speed EOP to
the RESUME signaling when this bit is cleared.
Device mode.
Host mode.
DS60001290E-page 122
2014-2017 Microchip Technology Inc.

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