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PIC32MX230F128L-I/PF 查看數據表(PDF) - Microchip Technology

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PIC32MX230F128L-I/PF Datasheet PDF : 382 Pages
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16.1 Control Registers
TABLE 16-1: OUTPUT COMPARE 1 THROUGH OUTPUT COMPARE 5 REGISTER MAP
Bits
31/15
30/14
29/13
28/12
27/11
26/10
25/9
24/8
23/7
22/6
21/5
20/4
19/3
18/2
17/1
16/0
3000
OC1CON
31:16
15:0
ON
SIDL
0000
OC32 OCFLT OCTSEL
OCM<2:0>
0000
3010
OC1R
31:16
15:0
OC1R<31:0>
xxxx
xxxx
3020
OC1RS
31:16
15:0
OC1RS<31:0>
xxxx
xxxx
3200
OC2CON
31:16
15:0
ON
SIDL
0000
OC32 OCFLT OCTSEL
OCM<2:0>
0000
3210
OC2R
31:16
15:0
OC2R<31:0>
xxxx
xxxx
3220
OC2RS
31:16
15:0
OC2RS<31:0>
xxxx
xxxx
3400
OC3CON
31:16
15:0
ON
SIDL
0000
OC32 OCFLT OCTSEL
OCM<2:0>
0000
3410
OC3R
31:16
15:0
OC3R<31:0>
xxxx
xxxx
3420
OC3RS
31:16
15:0
OC3RS<31:0>
xxxx
xxxx
3600
OC4CON
31:16
15:0
ON
SIDL
0000
OC32 OCFLT OCTSEL
OCM<2:0>
0000
3610
OC4R
31:16
15:0
OC4R<31:0>
xxxx
xxxx
3620
OC4RS
31:16
15:0
OC4RS<31:0>
xxxx
xxxx
3800
OC5CON
31:16
15:0
ON
SIDL
0000
OC32 OCFLT OCTSEL
OCM<2:0>
0000
3810
OC5R
31:16
15:0
OC5R<31:0>
xxxx
xxxx
3820
OC5RS
31:16
15:0
OC5RS<31:0>
xxxx
xxxx
Legend: x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Note 1:
All registers in this table have corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See Section 11.2 “CLR, SET, and INV Registers” for
more information.

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