STLC5460 查看數據表（PDF） - STMicroelectronics

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STLC5460

LINE CARD INTERFACE CONTROLLER

STMicroelectronics 

STLC5460

AUXILIARY MEMORY ACCESSES: CM=0

Write Auxiliary Memory: Receive Monitor channels

CMD and SRC registers are written if their bits have not the right value.

CMD and SRC registers can be written in any order.

DST register is always written the last.

R CM

00

CMD

Not used

R=0 Write

CM=0 Auxiliary Memory

SRC

Data to initiate

8

DST

MON TX 1 of 16 TX MON

1 0 channel s

6

IN

AUXILIARY MEMORY

A

16 words assigned t o

8 RX MON channels of MUX 0

&

8 RX MON channels of MUX 1

Read Auxiliary Memory in two steps: Receive Monitor channels

First step: register writing:

CMD register is written if its bits are not the right value.

SRC register is not written.

DST register is always written the last.

R CM

10

CMD

bits not used

SRC

Register not written

DST

MON TX 1 of 16 TX MON

10

channels

2

6

AUXILIARY MEMORY

16 words assigned to

A

8 RX MON channels of MUX0

&

8 RX MON channels of MUX1

OUT OUT

3

8

R CM

10

MON status

data which has been

received

MON TX 1 of 16 TX MON

10

channels

CMD

SRC

DST

Second step, register reading:

CMD and SRC registers may be read in any order.

DST register is not changed.

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