STM8AF6286UDX 查看數據表（PDF） - STMicroelectronics

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产品描述 (功能)

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STM8AF6286UDX

Automotive 8-bit MCU, with up to 128 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, CAN, USART, SPI, I2C, 3 to 5.5 V

STMicroelectronics 

STM8AF526x/8x/Ax STM8AF6269/8x/Ax

Memory and register map

Address

0x00 5250

0x00 5251

0x00 5252

0x00 5253

0x00 5254

0x00 5255

0x00 5256

0x00 5257

0x00 5258

0x00 5259

0x00 525A

0x00 525B

0x00 525C

0x00 525D

0x00 525E

0x00 525F

0x00 5260

0x00 5261

0x00 5262

0x00 5263

0x00 5264

0x00 5265

0x00 5266

0x00 5267

0x00 5268

0x00 5269

0x00 526A

0x00 526B

0x00 526C

0x00 526D

0x00 526E

0x00 526F

0x00 5270 to

0x00 52FF

Table 14. General hardware register map (continued)

Block

Register label

Register name

TIM1

TIM1_CR1

TIM1_CR2

TIM1_SMCR

TIM1_ETR

TIM1_IER

TIM1_SR1

TIM1_SR2

TIM1_EGR

TIM1_CCMR1

TIM1_CCMR2

TIM1_CCMR3

TIM1_CCMR4

TIM1_CCER1

TIM1_CCER2

TIM1_CNTRH

TIM1_CNTRL

TIM1_PSCRH

TIM1_PSCRL

TIM1_ARRH

TIM1_ARRL

TIM1_RCR

TIM1_CCR1H

TIM1_CCR1L

TIM1_CCR2H

TIM1_CCR2L

TIM1_CCR3H

TIM1_CCR3L

TIM1_CCR4H

TIM1_CCR4L

TIM1_BKR

TIM1_DTR

TIM1_OISR

TIM1 control register 1

TIM1 control register 2

TIM1 slave mode control register

TIM1 external trigger register

TIM1 Interrupt enable register

TIM1 status register 1

TIM1 status register 2

TIM1 event generation register

TIM1 capture/compare mode register 1

TIM1 capture/compare mode register 2

TIM1 capture/compare mode register 3

TIM1 capture/compare mode register 4

TIM1 capture/compare enable register 1

TIM1 capture/compare enable register 2

TIM1 counter high

TIM1 counter low

TIM1 prescaler register high

TIM1 prescaler register low

TIM1 auto-reload register high

TIM1 auto-reload register low

TIM1 repetition counter register

TIM1 capture/compare register 1 high

TIM1 capture/compare register 1 low

TIM1 capture/compare register 2 high

TIM1 capture/compare register 2 low

TIM1 capture/compare register 3 high

TIM1 capture/compare register 3 low

TIM1 capture/compare register 4 high

TIM1 capture/compare register 4 low

TIM1 break register

TIM1 dead-time register

TIM1 output idle state register

Reset

status

0x00

0x00

0x00

0x00

0x00

0x00

0x00

0x00

0x00

0x00

0x00

0x00

0x00

0x00

0x00

0x00

0x00

0x00

0xFF

0xFF

0x00

0x00

0x00

0x00

0x00

0x00

0x00

0x00

0x00

0x00

0x00

0x00

Reserved area (147 bytes)

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