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STM32F100C8H7BTR(2010) 查看數據表(PDF) - STMicroelectronics

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STM32F100C8H7BTR Datasheet PDF : 84 Pages
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Electrical characteristics
STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB
Figure 28. SPI timing diagram - slave mode and CPHA = 0
NSS input
CPHA= 0
CPOL=0
CPHA= 0
CPOL=1
tSU(NSS)
tc(SCK)
tw(SCKH)
tw(SCKL)
ta(SO)
MISO
OUT P UT
MOSI
I NPUT
tsu(SI)
tv(SO)
MS B O UT
M SB IN
th(SI)
th(SO)
BI T6 OUT
B I T1 IN
Figure 29. SPI timing diagram - slave mode and CPHA = 1(1)
th(NSS)
tr(SCK)
tf(SCK)
tdis(SO)
LSB OUT
LSB IN
ai14134c
NSS input
tSU(NSS)
CPHA=1
CPOL=0
CPHA=1
CPOL=1
tw(SCKH)
tw(SCKL)
MISO
OUT P UT
MOSI
I NPUT
ta(SO)
tsu(SI)
tc(SCK)
tv(SO)
MS B O UT
th(SI)
M SB IN
th(SO)
BI T6 OUT
B I T1 IN
1. Measurement points are done at CMOS levels: 0.3VDD and 0.7VDD.
th(NSS)
tr(SCK)
tf(SCK)
tdis(SO)
LSB OUT
LSB IN
ai14135
64/84
Doc ID 16455 Rev 2

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