STM32F100V6T7BTR 查看數據表（PDF） - STMicroelectronics

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STM32F100V6T7BTR

Low & medium-density value line, advanced ARM®-based 32-bit MCU with 16 to 128 KB Flash, 12 timers, ADC, DAC & 8 comm interfaces

STMicroelectronics 

STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB

Electrical characteristics

Table 42. ADC characteristics

Symbol

Parameter

Conditions

Min

Typ Max

Unit

VDDA

VREF+

IVREF

fADC

fS(2)

Power supply

Positive reference voltage

Current on the VREF input

pin

ADC clock frequency

Sampling rate

fTRIG(2) External trigger frequency

VAIN(3) Conversion voltage range

RAIN(2) External input impedance

RADC(2)

CADC(2)

Sampling switch resistance

Internal sample and hold

capacitor

tCAL(2) Calibration time

tlat(2)

Injection trigger conversion

latency

tlatr(2)

Regular trigger conversion

latency

tS(2) Sampling time

tSTAB(2) Power-up time

tCONV(2)

Total conversion time

(including sampling time)

-

-

-

-

-

fADC = 12 MHz

-

-

See Equation 1 and

Table 43 for details

-

-

fADC = 12 MHz

-

fADC = 12 MHz

-

fADC = 12 MHz

-

fADC = 12 MHz

-

fADC = 12 MHz

-

2.4

-

3.6

V

2.4

-

VDDA

V

-

160(1) 220(1)

µA

0.6

-

12

MHz

0.05

-

1

MHz

-

-

705

kHz

-

-

17

1/fADC

0 (VSSA tied to

ground)

-

VREF+

V

-

-

50

κΩ

-

-

1

κΩ

-

-

8

pF

6.9

83

-

-

0.25

-

-

3(4)

-

-

0.166

-

-

2(4)

0.125

-

20.0

1.5

-

239.5

0

0

1

1.17

-

21

14 to 252 (tS for sampling +12.5 for

successive approximation)

µs

1/fADC

µs

1/fADC

µs

1/fADC

µs

1/fADC

µs

µs

1/fADC

1. Based on characterization results, not tested in production.

2. Guaranteed by design.

3. RVReEfeFr+tocaTnabbelein4t:eLronwall&y cmoendnieucmte-ddetnosVitDyDSATaMn3d2VFR1E0F0-xcxapninbedeinfitneitrinoanlslyacnodnFneigcutered 6tofoVrSfSuArt,hdeerpdeentadiilnsg. on the package.

4. For external triggers, a delay of 1/fPCLK2 must be added to the latency specified in Table 42.

EqRuAaItNio<nf--A-1--D--:--C-R---×-A----I-CN-----Am---D--T-aC---xS--×---f--o-l-n--r--m(---2--u-N---l-+-a---2:---) – RADC

The above formula (Equation 1) is used to determine the maximum external impedance allowed for an

error below 1/4 of LSB. Here N = 12 (from 12-bit resolution).

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