STM8S208RB 查看數據表（PDF） - STMicroelectronics
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STM8S208RB Datasheet PDF : 103 Pages
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STM8S207xx, STM8S208xx
Memory and register map
Table 9. General hardware register map (continued)
Address
Block
Register label
Register name
0x00 532B
0x00 532C
0x00 532D
0x00 532E
0x00 532F
0x00 5330
0x00 5331 to
0x00 533F
0x00 5340
0x00 5341
0x00 5342
0x00 5343
0x00 5344
0x00 5345
0x00 5346
0x00 5347 to
0x00 53FF
0x00 5400
0x00 5401
0x00 5402
0x00 5403
0x00 5404
0x00 5405
0x00 5406
0x00 5407
0x00 5408 to
0x00 541F
0x00 5420
0x00 5421
0x00 5422
0x00 5423
0x00 5424
0x00 5425
0x00 5426
0x00 5427
TIM3
TIM4
ADC2
beCAN
TIM3_ARRH
TIM3_ARRL
TIM3_CCR1H
TIM3_CCR1L
TIM3_CCR2H
TIM3_CCR2L
TIM3 auto-reload register high
TIM3 auto-reload register low
TIM3 capture/compare register 1 high
TIM3 capture/compare register 1 low
TIM3 capture/compare register 2 high
TIM3 capture/compare register 2 low
Reserved area (15 bytes)
TIM4_CR1
TIM4_IER
TIM4_SR
TIM4_EGR
TIM4_CNTR
TIM4_PSCR
TIM4_ARR
TIM4 control register 1
TIM4 interrupt enable register
TIM4 status register
TIM4 event generation register
TIM4 counter
TIM4 prescaler register
TIM4 auto-reload register
Reserved area (185 bytes)
ADC _CSR
ADC_CR1
ADC_CR2
ADC_CR3
ADC_DRH
ADC_DRL
ADC_TDRH
ADC_TDRL
ADC control/status register
ADC configuration register 1
ADC configuration register 2
ADC configuration register 3
ADC data register high
ADC data register low
ADC Schmitt trigger disable register high
ADC Schmitt trigger disable register low
Reserved area (24 bytes)
CAN_MCR
CAN_MSR
CAN_TSR
CAN_TPR
CAN_RFR
CAN_IER
CAN_DGR
CAN_FPSR
CAN master control register
CAN master status register
CAN transmit status register
CAN transmit priority register
CAN receive FIFO register
CAN interrupt enable register
CAN diagnosis register
CAN page selection register
Reset
status
0xFF
0xFF
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0xFF
0x00
0x00
0x00
0x00
0xXX
0xXX
0x00
0x00
0x02
0x02
0x00
0x0C
0x00
0x00
0x0C
0x00
Doc ID 14733 Rev 12
41/103
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