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AT90PWM2B-16SU 查看數據表(PDF) - Atmel Corporation

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AT90PWM2B-16SU Datasheet PDF : 365 Pages
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AT90PWM2/3/2B/3B
16.3 PSC Description
Figure 16-1. Power Stage Controller 0 or 1 Block Diagram
PSC Counter
=
OCRnRB
=
OCRnSB
=
OCRnRA
=
OCRnSA
PICRn
Waveform
Generator B
PSC Input
Module B
PSCn Input B
PSCOUTn1
( From Analog
Comparator n Ouput )
Part B
PISELnB
PSC Input
Module A
PSCn Input A
PISELnA
PSCINn
Waveform
Generator A
PSCOUTn0
Part A
PCNFn
PCTLn
PFRCnB
PFRCnA
POM2(PSC2 only)
PSOCn
Note: n = 0, 1
The principle of the PSC is based on the use of a counter (PSC counter). This counter is able to
count up and count down from and to values stored in registers according to the selected run-
ning mode.
The PSC is seen as two symmetrical entities. One part named part A which generates the output
PSCOUTn0 and the second one named part B which generates the PSCOUTn1 output.
Each part A or B has its own PSC Input Module to manage selected input.
4317K–AVR–03/2013
132

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