DSPIC33FJ256GP710AT-I/PT 查看數據表（PDF） - Microchip Technology
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DSPIC33FJ256GP710AT-I/PT Datasheet PDF : 322 Pages
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dsPIC33FJXXXGPX06/X08/X10
TABLE A-2: MAJOR SECTION UPDATES (CONTINUED)
Section Name
Update Description
Section 19.0 “Enhanced CAN
(ECAN™) Module”
Changed bit 11 in the ECAN Control Register 1 (CiCTRL1) to Reserved
(see Register 19-1).
Section 21.0 “10-Bit/12-Bit
Analog-to-Digital Converter (ADC)”
Section 22.0 “Special Features”
Section 25.0 “Electrical
Characteristics”
Added the ECAN Filter 15-8 Mask Selection (CiFMSKSEL2) register (see
Register 19-19).
Replaced the ADC Module Block Diagram (see Figure 21-1) and removed
Figure 21-2.
Added Note 2 to the Device Configuration Register Map (see Table 22-1)
Updated Typical values for Thermal Packaging Characteristics (see
Table 25-3).
Updated Min and Max values for parameter DC12 (RAM Data Retention
Voltage) and added Note 4 (see Table 25-4).
Updated Power-Down Current Max values for parameters DC60b and
DC60c (see Table 25-7).
Updated Characteristics for I/O Pin Input Specifications (see Table 25-9).
Updated Program Memory values for parameters 136, 137 and 138
(renamed to 136a, 137a and 138a), added parameters 136b, 137b and
138b, and added Note 2 (see Table 25-12).
Added parameter OS42 (GM) to the External Clock Timing Requirements
(see Table 25-16).
Updated Watchdog Timer Time-out Period parameter SY20 (see
Table 25-21).
© 2009 Microchip Technology Inc.
DS70286C-page 311
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