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DSPIC33FJ128GP706AI 查看數據表(PDF) - Microchip Technology

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DSPIC33FJ128GP706AI
Microchip
Microchip Technology 
DSPIC33FJ128GP706AI Datasheet PDF : 350 Pages
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dsPIC33FJXXXGPX06A/X08A/X10A
REGISTER 7-12: IEC2: INTERRUPT ENABLE CONTROL REGISTER 2 (CONTINUED)
bit 2
C1RXIE: ECAN1 Receive Data Ready Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
bit 1
SPI2IE: SPI2 Event Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
bit 0
SPI2EIE: SPI2 Error Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
© 2011 Microchip Technology Inc.
DS70593C-page 115

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