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STM32F302CCY6TR 查看數據表(PDF) - STMicroelectronics

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STM32F302CCY6TR Datasheet PDF : 144 Pages
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STM32F302xB STM32F302xC
Electrical characteristics
Table 75. DAC characteristics (continued)
Symbol
Parameter
Conditions
Min Typ
Max
tWAKEUP(3)
Wakeup time from off state
(Setting the ENx bit in the
DAC Control register)
CLOAD 50 pF,
RLOAD 5 kΩ
PSRR+ (1)
Power supply rejection ratio
(to VDDA) (static DC
measurement
CLOAD = 50 pF,
No RLOAD 5 kΩ,
-
6.5
10
-
–67
–40
1. Guaranteed by design.
2. Quiescent mode refers to the state of the DAC a keeping steady value on the output, so no dynamic consumption is
involved.
3. Guaranteed by characterization results.
Unit
µs
dB
Figure 36. 12-bit buffered /non-buffered DAC
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1. The DAC integrates an output buffer that can be used to reduce the output impedance and to drive external loads directly
without the use of an external operational amplifier. The buffer can be bypassed by configuring the BOFFx bit in the
DAC_CR register.
DocID025186 Rev 7
117/144
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