R5F10366GSP-U0 查看數據表（PDF） - Renesas Electronics
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R5F10366GSP-U0 Datasheet PDF : 110 Pages
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RL78/G12
2. ELECTRICAL SPECIFICATIONS (A, D: TA = −40 to +85°C)
(1) 20-, 24-pin products
(TA = −40 to +85°C, 1.8 V ≤ VDD ≤ 5.5 V, VSS = 0 V)
Parameter Symbol
Conditions
MIN.
TYP.
MAX.
(2/2)
Unit
Supply
IDD2 Note 2 HALT
current Note 1
mode
HS (High-speed fIH = 24 MHzNote 4
main) mode Note 6
VDD = 5.0 V
VDD = 3.0 V
440 1210 μA
440 1210
fIH = 16 MHzNote 4
VDD = 5.0 V
400
950
μA
VDD = 3.0 V
400
950
LS (Low-speed fIH = 8 MHzNote 4
main) mode Note 6
VDD = 3.0 V
VDD = 2.0 V
270
542
μA
270
542
HS (High-speed fMX = 20 MHzNote 3,
main) mode Note 6 VDD = 5.0 V
Square wave input
Resonator connection
280 1000 μA
450 1170
fMX = 20 MHzNote 3,
VDD = 3.0 V
Square wave input
Resonator connection
280 1000 μA
450 1170
fMX = 10 MHzNote 3,
VDD = 5.0 V
Square wave input
Resonator connection
190
590
μA
260
660
fMX = 10 MHzNote 3,
VDD = 3.0 V
Square wave input
Resonator connection
190
590
μA
260
660
LS (Low-speed
main) mode Note 6
fMX = 8 MHzNote 3,
VDD = 3.0 V
Square wave input
Resonator connection
110
360
μA
150
416
fMX = 8 MHzNote 3,
VDD = 2.0 V
Square wave input
Resonator connection
110
360
μA
150
416
IDD3 Note 5 STOP
mode
TA = −40°C
TA = +25°C
0.19 0.50 μA
0.24 0.50
TA = +50°C
0.32 0.80
TA = +70°C
0.48 1.20
TA = +85°C
0.74 2.20
<R> Notes 1. Total current flowing into VDD, including the input leakage current flowing when the level of the input pin is
fixed to VDD or VSS. The values below the MAX. column include the peripheral operation current. However,
not including the current flowing into the A/D converter, LVD circuit, I/O port, and on-chip pull-up/pull-down
resistors and the current flowing during data flash rewrite.
2. During HALT instruction execution by flash memory.
<R>
3. When high-speed on-chip oscillator clock is stopped.
4. When high-speed system clock is stopped.
5. Not including the current flowing into the 12-bit interval timer and watchdog timer.
6. Relationship between operation voltage width, operation frequency of CPU and operation mode is as
follows.
HS(High speed main) mode: VDD = 2.7 V to 5.5 V @1 MHz to 24 MHz
VDD = 2.4 V to 5.5 V @1 MHz to 16 MHz
LS(Low speed main) mode: VDD = 1.8 V to 5.5 V @1 MHz to 8 MHz
Remarks 1.
2.
3.
fMX: High-speed system clock frequency (X1 clock oscillation frequency or external main system clock
frequency)
fIH: high-speed on-chip oscillator clock frequency
Except temperature condition of the TYP. value is TA = 25°C, other than STOP mode
R01DS0193EJ0200 Rev.2.00
Sep 06, 2013
Page 24 of 106
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