DSPIC33FJ06GS502-I/ML 查看數據表（PDF） - Microchip Technology
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DSPIC33FJ06GS502-I/ML Datasheet PDF : 346 Pages
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dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
REGISTER 7-9: IFS5: INTERRUPT FLAG STATUS REGISTER 5
R/W-0
R/W-0
U-0
U-0
U-0
U-0
PWM2IF(1)
PWM1IF
—
—
—
—
bit 15
U-0
U-0
—
—
bit 8
U-0
—
bit 7
U-0
U-0
U-0
U-0
U-0
—
—
—
—
—
U-0
U-0
—
—
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
bit 14
bit 13-0
PWM2IF: PWM2 Interrupt Flag Status bit(1)
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
PWM1IF: PWM1 Interrupt Flag Status bit
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
Unimplemented: Read as ‘0’
Note 1: This bit is not implemented in dsPIC33FJ06GS101/102 devices.
DS70318D-page 108
Preliminary
© 2009 Microchip Technology Inc.
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