DSPIC30F2012AT-20E/ML 查看數據表（PDF） - Microchip Technology

零件编号

产品描述 (功能)

生产厂家

DSPIC30F2012AT-20E/ML

High-Performance, 16-bit Digital Signal Controllers

Microchip Technology 

TABLE 17-7: SYSTEM INTEGRATION REGISTER MAP

SFR Name Addr. Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6

Bit 5

Bit 4 Bit 3 Bit 2

Bit 1

Bit 0

Reset State

RCON

OSCCON

OSCTUN

PMD1

PMD2

Legend:

Note 1:

2:

3:

0740 TRAPR IOPUWR BGST LVDEN

0742 —

COSC<2:0>

—

0744 —

—

—

—

—

0770 —

—

T3MD T2MD T1MD

0772 —

—

—

—

—

— = unimplemented bit, read as ‘0’

Reset state depends on type of Reset.

Reset state depends on Configuration bits.

Only available on dsPIC30F3013.

LVDL<3:0>

NOSC<2:0>

—

—

—

—

—

—

— IC2MD IC1MD

EXTR SWR

POST<1:0>

—

—

I2CMD U2MD(3)

—

—

SWDTEN

LOCK

—

U1MD

—

WDTO

—

—

—

—

SLEEP

CF

TUN3

SPI1MD

—

IDLE

—

TUN2

—

—

BOR

LPOSCEN

TUN1

—

OC2MD

POR

OSWEN

TUN0

ADCMD

OC1MD

(Note 1)

(Note 2)

(Note 2)

0000 0000 0000 0000

0000 0000 0000 0000

TABLE 17-8: DEVICE CONFIGURATION REGISTER MAP

File Name Addr. Bits 23-16 Bit 15 Bit 14 Bit 13 Bit 12 Bit 11

Bit 10

Bit 9

FOSC

F80000

—

FCKSM<1:0>

—

—

—

FOS<2:0>

FWDT

F80002

—

FWDTEN —

—

—

—

—

—

FBORPOR F80004

—

MCLREN —

—

—

— Reserved(1) Reserved(1)

FGS

F8000A

—

—

—

—

—

—

—

—

FICD

Legend:

Note 1:

2:

3:

F8000C

—

—

—

—

—

—

—

—

— = unimplemented bit, read as ‘0’

These bits are always read as ‘1’.

The FGS<2> bit is a read-only copy of the GCP bit (FGS<1>).

Refer to “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.

Bit 8

—

Reserved(1)

—

—

Bit 7 Bit 6

—

—

—

—

BOREN —

—

—

BKBUG COE

Bit 5 Bit 4

—

FWPSA<1:0>

BORV<1:0>

—

—

—

—

Bit 3

—

—

—

Bit 2

Bit 1 Bit 0

FPR<4:0>

FWPSB<3:0>

—

FPWRT<1:0>

Reserved(2) GCP GWRP

—

ICS<1:0>

Share Link: