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STM8AF6268TC 查看數據表(PDF) - STMicroelectronics

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STM8AF6268TC Datasheet PDF : 89 Pages
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STM8AF61xx, STM8AF62xx
Electrical characteristics
10.3.11
10-bit ADC characteristics
Subject to general operating conditions for VDDA, fMASTER, and TA unless otherwise
specified.
Table 42. ADC characteristics
Symbol
Parameter
Conditions Min Typ Max Unit
fADC
ADC clock frequency
-
111 kHz - 4 MHz kHz/MHz
VDDA Analog supply
-
3
-
5.5
VREF+ Positive reference voltage
-
2.75
-
VDDA
VREF- Negative reference voltage
-
VSSA
-
0.5
V
-
VSSA
-
VDDA
VAIN
Conversion voltage range(1)
Devices with
external VREF+/
VREF- pins
VREF-
-
VREF+
Csamp Internal sample and hold capacitor
-
-
-
3
pF
tS(1)
Sampling time
(3 x 1/fADC)
fADC = 2 MHz
fADC = 4 MHz
-
1.5
-
-
0.75 -
tSTAB Wakeup time from standby
fADC = 2 MHz
-
7
-
µs
fADC = 4 MHz
-
3.5
-
Total conversion time including
fADC = 2 MHz
-
7
-
tCONV
sampling time
(14 x 1/fADC)
fADC = 4 MHz
-
3.5
-
Rswitch Equivalent switch resistance
-
-
-
30
kΩ
1. During the sample time, the sampling capacitance, Csamp (3 pF typ), can be charged/discharged by the
external source. The internal resistance of the analog source must allow the capacitance to reach its final
voltage level within tS. After the end of the sample time tS, changes of the analog input voltage have no
effect on the conversion result.
Figure 40. Typical application with ADC
VAIN
RAIN
AINx
CAIN
VDD
VT
0.6V
VT
0.6V
STM8A
Rswitch
Ts
IL
10-bit A/D
conversion
Csamp
1. Legend: RAIN = external resistance, CAIN = capacitors, Csamp = internal sample and hold capacitor.
Doc ID 14952 Rev 6
69/89

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