DSPIC33FJ64GP204T-I/SO 查看數據表（PDF） - Microchip Technology

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DSPIC33FJ64GP204T-I/SO

High-Performance, 16-bit Digital Signal Controllers

Microchip Technology 

dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04

FIGURE 30-10:

SCKX

(CKP = 0)

SPIx MODULE MASTER MODE (CKE = 1) TIMING CHARACTERISTICS

SP36

SP11

SP10

SP21

SP20

SCKX

(CKP = 1)

SP35

SP20

SP21

SDOX

SDIX

MSb

Bit 14 - - - - - -1

SP40

SP30,SP31

MSb In

SP41

Bit 14 - - - -1

Note: Refer to Figure 30-1 for load conditions.

LSb

LSb In

TABLE 30-29: SPIx MODULE MASTER MODE (CKE = 1) TIMING REQUIREMENTS

AC CHARACTERISTICS

Standard Operating Conditions: 3.0V to 3.6V

(unless otherwise stated)

Operating temperature -40°C  TA  +85°C for Industrial

-40°C  TA  +125°C for Extended

Param

No.

Symbol

Characteristic(1)

Min Typ(2) Max Units

Conditions

SP10 TscL

SCKx Output Low Time(3)

TCY/2

—

—

ns See Note 3

SP11 TscH

SCKx Output High Time(3)

TCY/2

—

—

ns See Note 3

SP20 TscF

SCKx Output Fall Time(4)

—

—

—

ns See parameter D032

and Note 4

SP21 TscR

SCKx Output Rise Time(4)

—

—

—

ns See parameter D031

and Note 4

SP30 TdoF

SDOx Data Output Fall

Time(4)

—

—

—

ns See parameter D032

and Note 4

SP31 TdoR

SDOx Data Output Rise

Time(4)

—

—

—

ns See parameter D031

and Note 4

SP35 TscH2doV, SDOx Data Output Valid after —

6

20

ns

—

TscL2doV SCKx Edge

SP36 TdoV2sc, SDOx Data Output Setup to

30

—

—

ns

—

TdoV2scL First SCKx Edge

SP40 TdiV2scH, Setup Time of SDIx Data

23

—

—

ns

—

TdiV2scL Input to SCKx Edge

SP41 TscH2diL, Hold Time of SDIx Data Input 30

—

—

ns

—

TscL2diL to SCKx Edge

Note 1: These parameters are characterized but not tested in manufacturing.

2: Data in “Typ” column is at 3.3V, 25°C unless otherwise stated.

3: The minimum clock period for SCKx is 100 ns. The clock generated in Master mode must not violate this

specification.

4: Assumes 50 pF load on all SPIx pins.

 2009 Microchip Technology Inc.

Preliminary

DS70292D-page 341

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