STM8S005K6 STM8S005C6
Symbol Parameter
tRESETBL
Reset pin release to
vector fetch
Conditions
(1) Data guaranteed by design, not tested in production.
(2) Characterized with all I/Os tied to VSS.
Electrical characteristics
Typ
Max(1) Unit
150
μs
9.3.2.7
Current consumption of on-chip peripherals
Subject to general operating conditions for VDD and TA.
HSI internal RC/fCPU = fMASTER = 16 MHz.
Table 29: Peripheral current consumption
Symbol
Parameter
Typ.
IDD(TIM1)
TIM1 supply current(1)
230
IDD(TIM2)
TIM2 supply current (1)
115
IDD(TIM3)
TIM3 timer supply current (1)
90
IDD(TIM4)
TIM4 timer supply current (1)
30
IDD(UART2)
UART2 supply current(2)
110
IDD(SPI)
SPI supply current (2)
45
IDD(I 2 C)
I2C supply current (2)
65
IDD(ADC1)
ADC1 supply current when converting(3)
955
Unit
µA
(1) Data based on a differential IDD measurement between reset configuration and timer
counter running at 16 MHz. No IC/OC programmed (no I/O pads toggling). Not tested in
production.
(2) Data based on a differential IDD measurement between the on-chip peripheral when kept
under reset and not clocked and the on-chip peripheral when clocked and not kept under
reset. No I/O pads toggling. Not tested in production.
(3) Data based on a differential IDD measurement between reset configuration and continuous
A/D conversions. Not tested in production.
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