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PIC16F913T-ISP 查看數據表(PDF) - Microchip Technology

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PIC16F913T-ISP Datasheet PDF : 330 Pages
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PIC16F913/914/916/917/946
TABLE 19-9: PIC16F913/914/916/917/946 A/D CONVERSION REQUIREMENTS
Standard Operating Conditions (unless otherwise stated)
Operating temperature -40°C TA +125°C
Param
No.
Sym.
Characteristic
Min.
AD130* TAD A/D Clock Period
1.6
3.0
A/D Internal RC
Oscillator Period
3.0
1.6
AD131 TCNV Conversion Time
(not including
Acquisition Time)(1)
AD132* TACQ Acquisition Time
AD133* TAMP Amplifier Settling Time —
AD134 TGO Q4 to A/D Clock Start —
Typ†
6.0
4.0
11
11.5
TOSC/2
Max. Units
Conditions
9.0 μs TOSC-based, VREF 3.0V
9.0 μs TOSC-based, VREF full range
ADCS<1:0> = 11 (ADRC mode)
9.0 μs At VDD = 2.5V
6.0 μs At VDD = 5.0V
— TAD Set GO/DONE bit to new data in A/D
Result register
μs
5 μs
——
— TOSC/2 + TCY
— If the A/D clock source is selected as
RC, a time of TCY is added before the
A/D clock starts. This allows the SLEEP
instruction to be executed.
* These parameters are characterized but not tested.
† Data in “Typ” column is at 5.0V, 25°C unless otherwise stated. These parameters are for design guidance
only and are not tested.
Note 1: ADRESH and ADRESL registers may be read on the following TCY cycle.
2: See Section 12.3 “A/D Acquisition Requirements” for minimum conditions.
© 2007 Microchip Technology Inc.
DS41250F-page 273

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