PIC16F913/914/916/917/946
3.5.1.7 RC6/TX/CK/SCK/SCL/SEG9
Figure 3-20 shows the diagram for this pin. The RC6
pin is configurable to function as one of the following:
• a general purpose I/O
• an asynchronous serial output
• a synchronous clock I/O
• a SPI clock I/O
• an I2C data I/O
• an analog output for the LCD
FIGURE 3-20:
BLOCK DIAGRAM OF RC6
PORT/USART/SSP Mode Select(1)
Data Bus
I2C™ Data Out
TX/CK Data Out
SCK Data Out
D
Q
WR PORTC
CK Q
Data Latch
D
Q
WR TRISC
CK Q
TRIS Latch
USART or I2C™ Drive
RD TRISC
SE9 and LCDEN
Schmitt
Trigger
VDD
I/O Pin
VSS
RD PORTC
CK/SCL/SCK Input
SEG9
SE9 and LCDEN
Note 1:
If all three data output sources are enabled, the following priority order will be used:
• USART data (highest)
• SSP data
• PORT data (lowest)
DS41250F-page 68
© 2007 Microchip Technology Inc.