STM32L151VBU6(2013) 查看數據表（PDF） - STMicroelectronics
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STM32L151VBU6
(Rev.:2013)
(Rev.:2013)
STMicroelectronics
STM32L151VBU6 Datasheet PDF : 121 Pages
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Electrical characteristics
STM32L151x6/8/B, STM32L152x6/8/B
Table 25. Peripheral current consumption(1) (continued)
Typical consumption, VDD = 3.0 V, TA = 25 °C
Peripheral
Range 1, Range 2, Range 3,
VCORE=
1.8 V
VCORE=
1.5 V
VCORE=
1.2 V
Low power
sleep and
Unit
VOS[1:0] = VOS[1:0] = VOS[1:0] =
run
01
10
11
SYSCFG &
RI
3
2.5
2
2.5
TIM9
9
7.5
6
7
APB2
TIM10
TIM11
ADC(2)
6.5
5.5
4.5
5.5
7
6
4.5
5.5
11.5
9.5
8
9
SPI1
5
4.5
3
4
USART1
9
7.5
6
7.5
GPIOA
GPIOB
GPIOC
5
4.5
3.5
4
µA/MHz
5
4.5
3.5
4.5
(fHCLK)
5
4.5
3.5
4.5
GPIOD
5
4.5
3.5
4.5
AHB
GPIOE
5
4.5
3.5
4.5
GPIOH
4
4
3
3.5
CRC
1
0.5
0.5
0.5
FLASH
13
11.5
9
18.5
DMA1
12
10
8
10.5
All enabled
166
138
106
130
IDD (RTC)
0.47
IDD (LCD)
IDD
(3)
(ADC)
IDD
(4)
(DAC)
3.1
1450
340
IDD (COMP1)
0.16
µA
Slow mode
2
IDD (COMP2)
Fast mode
5
IDD
(PVD
/
(5)
BOR)
2.6
IDD (IWDG)
0.25
1. Data based on differential IDD measurement between all peripherals OFF an one peripheral with clock
enabled, in the following conditions: fHCLK = 32 MHz (range 1), fHCLK = 16 MHz (range 2), fHCLK = 4 MHz
(range 3), fHCLK = 64kHz (Low power run/sleep), fAPB1 = fHCLK, fAPB2 = fHCLK, default prescaler value for
each peripheral. The CPU is in Sleep mode in both cases. No I/O pins toggling. Not tested in production.
2. HSI oscillator is OFF for this measure.
3. Data based on a differential IDD measurement between ADC in reset configuration and continuous ADC
conversion (HSI consumption not included).
64/121
Doc ID 17659 Rev 8
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