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PSD4204G3V-70UI 查看數據表(PDF) - STMicroelectronics

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PSD4204G3V-70UI Datasheet PDF : 89 Pages
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PSD4235G2
Table 69. Reset (Reset)Timing
Symbol
Parameter
Conditions
Min
tNLNH
RESET Active Low Time 1
150
tNLNH–PO
Power On Reset Active Low Time
1
tNLNH–A
Warm Reset 2
25
tOPR
RESET High to Operational Device
Note: 1. Reset (RESET) does not reset Flash memory Program or Erase cycles.
2. Warm reset aborts Flash memory Program or Erase cycles, and puts the device in Read mode.
Figure 48. Reset (RESET) Timing
Max
Unit
ns
ms
µs
120
ns
VCC
RESET
VCC(min)
tNLNH-PO
Power-On Reset
tOPR
tNLNH
tNLNH-A
Warm Reset
tOPR
AI02866b
Table 70. VSTBYON Timing
Symbol
Parameter
tBVBH
VSTBY Detection to VSTBYON Output High
tBXBL
VSTBY Off Detection to VSTBYON Output
Low
Note: 1. VSTBYON timing is measured at VCC ramp rate of 2 ms.
Conditions
(Note 1)
(Note 1)
Min
Typ
Max Unit
20
µs
20
µs
Table 71. Program, Write and Erase Times
Symbol
Parameter
Min.
Typ.
Flash Program
8.5
Flash Bulk Erase1 (pre-programmed)
3
Flash Bulk Erase (not pre-programmed)
10
tWHQV3
Sector Erase (pre-programmed)
1
tWHQV2
Sector Erase (not pre-programmed)
2.2
tWHQV1
Byte Program
14
Program / Erase Cycles (per Sector)
100,000
tWHWLO
Sector Erase Time-Out
100
tQ7VQV
DQ7 Valid to Output (DQ7-DQ0) Valid (Data Polling)2
Note: 1. Programmed to all zero before erase.
2. The polling status, DQ7, is valid tQ7VQV time units before the data byte, DQ0-DQ7, is valid for reading.
3. DQ7 is DQ15 for Motorola MCU with 16-bit data bus.
Max.
30
30
1200
30
Unit
s
s
s
s
s
µs
cycles
µs
ns
82/89

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