PSD4243G6V-20UI 查看數據表（PDF） - STMicroelectronics
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PSD4243G6V-20UI
STMicroelectronics
PSD4243G6V-20UI Datasheet PDF : 89 Pages
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Table 72. ISC Timing
Symbol
Parameter
Conditions
tISCCF
Clock (TCK, PC1) Frequency (except for
PLD)
(Note 1)
tISCCH
Clock (TCK, PC1) High Time (except for
PLD)
(Note 1)
tISCCL
Clock (TCK, PC1) Low Time (except for
PLD)
(Note 1)
tISCCFP Clock (TCK, PC1) Frequency (PLD only)
(Note 2)
tISCCHP Clock (TCK, PC1) High Time (PLD only)
(Note 2)
tISCCLP Clock (TCK, PC1) Low Time (PLD only)
(Note 2)
tISCPSU ISC Port Set Up Time
tISCPH ISC Port Hold Up Time
tISCPCO ISC Port Clock to Output
tISCPZV ISC Port High-Impedance to Valid Output
tISCPVZ
ISC Port Valid Output to
High-Impedance
Note: 1. For non-PLD Programming, Erase or in ISC by-pass mode.
2. For Program or Erase PLD only.
Figure 49. ISC Timing
TCK
tISCCH
t ISCCL
t ISCPSU tISCPH
PSD4235G2
-70
Min Max
20
-90
Unit
Min Max
18 MHz
23
26
ns
23
26
ns
2
2 MHz
240
240
ns
240
240
ns
6
8
ns
5
5
ns
21
23
ns
21
23
ns
21
23
ns
TDI/TMS
t ISCPZV
t ISCPCO
ISC OUTPUTS/TDO
tISCPVZ
ISC OUTPUTS/TDO
AI02865
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