STM32F301x6 STM32F301x8
Electrical characteristics
Figure 24. Recommended NRST pin protection
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6.3.16
069
1. The reset network protects the device against parasitic resets.
2.
The user must ensure that the
Table 57. Otherwise the reset
wleilvl enlootnbethteakNeRnSinTtopiancccaonungtobbyetlhoewdtheevicVeIL. (NRST)
max
level
specified
in
3. The user must place the external capacitor on NRST as close as possible to the chip.
Timer characteristics
The parameters given in Table 58 are guaranteed by design.
Refer to Section 6.3.14: I/O port characteristics for details on the input/output alternate
function characteristics (output compare, input capture, external clock, PWM output).
Table 58. TIMx(1)(2) characteristics
Symbol
Parameter
Conditions
Min
Max
Unit
-
1
tres(TIM) Timer resolution time
fTIMxCLK = 72 MHz
fTIMxCLK = 144 MHz,
x = 1, 15,16, 17
13.9
6.95
fEXT
Timer external clock
-
frequency on CH1 to CH4 fTIMxCLK = 72 MHz
0
0
ResTIM Timer resolution
TIMx (except TIM2)
-
TIM2
-
-
1
tCOUNTER
16-bit counter clock period fTIMxCLK = 72 MHz
fTIMxCLK = 144 MHz,
x= 1/15/16/17
0.0139
0.0069
-
-
tMAX_COUNT
Maximum possible count
with 32-bit counter
fTIMxCLK = 72 MHz
fTIMxCLK = 144 MHz,
x= 1/15/16/17
-
-
-
tTIMxCLK
-
ns
-
ns
fTIMxCLK/2
36
16
32
65536
910
MHz
MHz
bit
tTIMxCLK
µs
455
µs
65536 × 65536 tTIMxCLK
59.65
s
29.825
s
1. TIMx is used as a general term to refer to the TIM1, TIM2, TIM15, TIM16 and TIM17 timers.
2. Guaranteed by design.
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