PIC18F46K80T-I/SP 查看數據表（PDF） - Microchip Technology
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PIC18F46K80T-I/SP
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PIC18F46K80T-I/SP Datasheet PDF : 623 Pages
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PIC18F66K80 FAMILY
20.2.2 TIMER1/2/3/4 MODE SELECTION
The timers that are to be used with the capture feature
(Timer1 2, 3 or 4) must be running in Timer mode or
Synchronized Counter mode. In Asynchronous
Counter mode, the capture operation may not work.
The timer to be used with each ECCP module is
selected in the CCPTMRS register (Register 20-2).
20.2.3 SOFTWARE INTERRUPT
When the Capture mode is changed, a false capture
interrupt may be generated. The user should keep the
CCP1IE interrupt enable bit clear to avoid false inter-
rupts. The interrupt flag bit, CCP1IF, should also be
cleared following any such change in operating mode.
20.2.4 ECCP PRESCALER
There are four prescaler settings in Capture mode; they
are specified as part of the operating mode selected by
the mode select bits (CCP1M<3:0>). Whenever the
ECCP module is turned off, or Capture mode is dis-
abled, the prescaler counter is cleared. This means
that any Reset will clear the prescaler counter.
Switching from one capture prescaler to another may
generate an interrupt. Also, the prescaler counter will
not be cleared; therefore, the first capture may be from
a non-zero prescaler. Example 20-1 provides the
recommended method for switching between capture
prescalers. This example also clears the prescaler
counter and will not generate the “false” interrupt.
EXAMPLE 20-1: CHANGING BETWEEN
CAPTURE PRESCALERS
CLRF
MOVLW
MOVWF
CCP1CON
; Turn ECCP module off
NEW_CAPT_PS ; Load WREG with the
; new prescaler mode
; value and ECCP ON
CCP1CON
; Load ECCP1CON with
; this value
FIGURE 20-1:
CAPTURE MODE OPERATION BLOCK DIAGRAM
ECCP1 Pin
Prescaler
1, 4, 16
CCP1CON<3:0>
Q1:Q4
Set CCP1IF
C1TSEL0
C1TSEL1
C1TSEL2
and
Edge Detect
C1TSEL0
C1TSEL1
C1TSEL2
4
4
TMR3H
TMR3L
TMR3
Enable
CCPR1H CCPR1L
TMR1
Enable
TMR1H TMR1L
2010-2012 Microchip Technology Inc.
DS39977F-page 269
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