S25FL128SDPMFVA03 查看數據表（PDF） - Cypress Semiconductor
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S25FL128SDPMFVA03
Cypress Semiconductor
S25FL128SDPMFVA03 Datasheet PDF : 144 Pages
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S25FL128S, S25FL256S
Table 10.1 S25FL128S and S25FL256S Instruction Set (sorted by instruction) (Continued)
Instruction
(Hex)
90
9F
A3
A6
A7
AB
B9
BB
BC
BD
BE
C7
D8
DC
E0
E1
E2
E3
E4
E5
E6
E7
E8
E9
EB
EC
ED
EE
F0
FF
Command Name
READ_ID (REMS)
RDID
MPM
PLBWR
PLBRD
RES
BRAC
DIOR
4DIOR
DDRDIOR
4DDRDIOR
BE
SE
4SE
DYBRD
DYBWR
PPBRD
PPBP
PPBE
Reserved-E5
Reserved-E6
PASSRD
PASSP
PASSU
QIOR
4QIOR
DDRQIOR
4DDRQIOR
RESET
MBR
Command Description
Read Electronic Manufacturer Signature
Read ID (JEDEC Manufacturer ID and JEDEC CFI)
Reserved for Multi-I/O-High Perf Mode (MPM)
PPB Lock Bit Write
PPB Lock Bit Read
Read Electronic Signature
Bank Register Access
(Legacy Command formerly used for Deep Power Down)
Dual I/O Read (3- or 4-byte address)
Dual I/O Read (4-byte address)
DDR Dual I/O Read (3- or 4-byte address)
DDR Dual I/O Read (4-byte address)
Bulk Erase (alternate command)
Erase 64 kB or 256 kB (3- or 4-byte address)
Erase 64 kB or 256 kB (4-byte address)
DYB Read
DYB Write
PPB Read
PPB Program
PPB Erase
Reserved
Reserved
Password Read
Password Program
Password Unlock
Quad I/O Read (3- or 4-byte address)
Quad I/O Read (4-byte address)
DDR Quad I/O Read (3- or 4-byte address)
DDR Quad I/O Read (4-byte address)
Software Reset
Mode Bit Reset
Maximum Frequency
(MHz)
133
133
133
133
133
50
133
104
104
80
80
133
133
133
133
133
133
133
133
133
133
133
104
104
80
80
133
133
Document Number: 001-98283 Rev. *I
Page 119 of 144
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